gpu: nvgpu: Split stalling interrupt handling

Split handling of stalling interrupt to Linux specific chip
agnostic and OS independent chip specific parts.

Linux specific chip independent part contains handler for ISR
and passing the control to a bottom half. It uses the new MC HALs
intr_stall (query interrupt status), intr_pause (pause interrupts)
and intr_resume (resume interrupts).

MC HAL isr_stall now returns void and gets called in thread context
and thus remove isr_thread_stall and replace the implementation with
isr_stall.

JIRA NVGPU-26

Change-Id: I206f330f6fc4a1f4def47c5f986585ac4080216d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1480243
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
index b2ec4be4..31867a88 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -24,8 +24,7 @@ void gp10b_init_mc(struct gpu_ops *gops);
 void mc_gp10b_intr_enable(struct gk20a *g);
 void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable,
                 bool is_stalling, u32 mask);
-irqreturn_t mc_gp10b_isr_stall(struct gk20a *g);
+void mc_gp10b_isr_stall(struct gk20a *g);
 irqreturn_t mc_gp10b_isr_nonstall(struct gk20a *g);
-irqreturn_t mc_gp10b_intr_thread_stall(struct gk20a *g);
 irqreturn_t mc_gp10b_intr_thread_nonstall(struct gk20a *g);
 #endif