gpu: nvgpu: gp10b: Enable interrupts in linsim

Change-Id: I7d4211743793b905a20080bb44c62c036f23c854
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/592336
Reviewed-by: Automatic_Commit_Validation_User

1 files changed, 11 insertions, 13 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
index cdafaf56..4f7ab698 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
@@ -21,19 +21,17 @@
 
 void mc_gp10b_intr_enable(struct gk20a *g)
 {
-        if (!tegra_platform_is_linsim()) {
-                gk20a_writel(g, mc_intr_en_clear_r(0), 0xffffffff);
-                gk20a_writel(g, mc_intr_en_set_r(0),
-                             mc_intr_pfifo_pending_f()
-                             | mc_intr_pgraph_pending_f());
-                gk20a_writel(g, mc_intr_en_clear_r(1), 0xffffffff);
-                gk20a_writel(g, mc_intr_en_set_r(1),
-                             mc_intr_pfifo_pending_f()
-                             | mc_intr_pgraph_pending_f()
-                             | mc_intr_priv_ring_pending_f()
-                             | mc_intr_ltc_pending_f()
-                             | mc_intr_pbus_pending_f());
-        }
+        gk20a_writel(g, mc_intr_en_clear_r(0), 0xffffffff);
+        gk20a_writel(g, mc_intr_en_set_r(0),
+                     mc_intr_pfifo_pending_f()
+                     | mc_intr_pgraph_pending_f());
+        gk20a_writel(g, mc_intr_en_clear_r(1), 0xffffffff);
+        gk20a_writel(g, mc_intr_en_set_r(1),
+                     mc_intr_pfifo_pending_f()
+                     | mc_intr_pgraph_pending_f()
+                     | mc_intr_priv_ring_pending_f()
+                     | mc_intr_ltc_pending_f()
+                     | mc_intr_pbus_pending_f());
 }
 
 irqreturn_t mc_gp10b_isr_stall(struct gk20a *g)