gpu: nvgpu: Implement engine_enum_from_type

Implement a helper function engine_enum_from_type. This allows
parsing device_info entries for LCE engine type.

Pascal has logical copy engine instead of CE2, so so add definition
of that.

Change-Id: I71f59c308641d84ac59fd57fc37d9b627bb07a43
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1147747
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
index 47c8fcc6..4d9573d1 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
@@ -108,9 +108,9 @@ irqreturn_t mc_gp10b_intr_thread_stall(struct gk20a *g)
 
         gk20a_dbg(gpu_dbg_intr, "stall intr %08x\n", mc_intr_0);
 
-        if (mc_intr_0 & BIT(g->fifo.engine_info[ENGINE_GR_GK20A].intr_id))
+        if (mc_intr_0 & g->fifo.engine_info[ENGINE_GR_GK20A].intr_mask)
                 gr_gk20a_elpg_protected_call(g, gk20a_gr_isr(g));
-        if (mc_intr_0 & BIT(g->fifo.engine_info[ENGINE_CE2_GK20A].intr_id)
+        if (mc_intr_0 & g->fifo.engine_info[ENGINE_CE2_GK20A].intr_mask
                 && g->ops.ce2.isr_stall)
                 g->ops.ce2.isr_stall(g);
         if (mc_intr_0 & mc_intr_pfifo_pending_f())
@@ -142,9 +142,9 @@ irqreturn_t mc_gp10b_intr_thread_nonstall(struct gk20a *g)
 
         if (mc_intr_1 & mc_intr_pfifo_pending_f())
                 gk20a_fifo_nonstall_isr(g);
-        if (mc_intr_1 & BIT(g->fifo.engine_info[ENGINE_GR_GK20A].intr_id))
+        if (mc_intr_1 & g->fifo.engine_info[ENGINE_GR_GK20A].intr_mask)
                 gk20a_gr_nonstall_isr(g);
-        if (mc_intr_1 & BIT(g->fifo.engine_info[ENGINE_CE2_GK20A].intr_id)
+        if (mc_intr_1 & g->fifo.engine_info[ENGINE_CE2_GK20A].intr_mask
                 && g->ops.ce2.isr_nonstall)
                 g->ops.ce2.isr_nonstall(g);