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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-04-06 13:55:48 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-10 22:04:20 -0400
commit57d624f900896a257e2e918e93e99a14f734aea5 (patch)
tree7c2f76516baad4d1d9acec583817fe4beee63bb2 /drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
parent3ba374a5d94f8c2067731155afaf79f03e6c390c (diff)
gpu: nvgpu: gp10b: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I8dc0ddf3b6ea38af6300c27558b60786c163da6d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457344 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/ltc_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/ltc_gp10b.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
index e1aa34a9..42bfbf29 100644
--- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
@@ -18,6 +18,8 @@
18#include "gk20a/gk20a.h" 18#include "gk20a/gk20a.h"
19#include "gm20b/ltc_gm20b.h" 19#include "gm20b/ltc_gm20b.h"
20 20
21#include <nvgpu/log.h>
22
21#include <nvgpu/hw/gp10b/hw_mc_gp10b.h> 23#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
22#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h> 24#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h>
23 25
@@ -128,8 +130,7 @@ static void gp10b_ltc_isr(struct gk20a *g)
128 u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); 130 u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE);
129 131
130 mc_intr = gk20a_readl(g, mc_intr_ltc_r()); 132 mc_intr = gk20a_readl(g, mc_intr_ltc_r());
131 gk20a_err(dev_from_gk20a(g), "mc_ltc_intr: %08x", 133 nvgpu_err(g, "mc_ltc_intr: %08x", mc_intr);
132 mc_intr);
133 for (ltc = 0; ltc < g->ltc_count; ltc++) { 134 for (ltc = 0; ltc < g->ltc_count; ltc++) {
134 if ((mc_intr & 1 << ltc) == 0) 135 if ((mc_intr & 1 << ltc) == 0)
135 continue; 136 continue;
@@ -142,7 +143,7 @@ static void gp10b_ltc_isr(struct gk20a *g)
142 ltc_ltcs_ltss_intr_ecc_sec_error_pending_f()) { 143 ltc_ltcs_ltss_intr_ecc_sec_error_pending_f()) {
143 u32 ecc_stats_reg_val; 144 u32 ecc_stats_reg_val;
144 145
145 gk20a_err(dev_from_gk20a(g), 146 nvgpu_err(g,
146 "Single bit error detected in GPU L2!"); 147 "Single bit error detected in GPU L2!");
147 148
148 ecc_stats_reg_val = 149 ecc_stats_reg_val =
@@ -162,7 +163,7 @@ static void gp10b_ltc_isr(struct gk20a *g)
162 ltc_ltcs_ltss_intr_ecc_ded_error_pending_f()) { 163 ltc_ltcs_ltss_intr_ecc_ded_error_pending_f()) {
163 u32 ecc_stats_reg_val; 164 u32 ecc_stats_reg_val;
164 165
165 gk20a_err(dev_from_gk20a(g), 166 nvgpu_err(g,
166 "Double bit error detected in GPU L2!"); 167 "Double bit error detected in GPU L2!");
167 168
168 ecc_stats_reg_val = 169 ecc_stats_reg_val =
@@ -177,7 +178,7 @@ static void gp10b_ltc_isr(struct gk20a *g)
177 ecc_stats_reg_val); 178 ecc_stats_reg_val);
178 } 179 }
179 180
180 gk20a_err(dev_from_gk20a(g), "ltc%d, slice %d: %08x", 181 nvgpu_err(g, "ltc%d, slice %d: %08x",
181 ltc, slice, ltc_intr); 182 ltc, slice, ltc_intr);
182 gk20a_writel(g, ltc_ltc0_lts0_intr_r() + 183 gk20a_writel(g, ltc_ltc0_lts0_intr_r() +
183 ltc_stride * ltc + lts_stride * slice, 184 ltc_stride * ltc + lts_stride * slice,