arm64: tegra: dts: Use new SID dt-bindings

Use bindings more specific to the ARM SMMU.

Change-Id: I0e2df8e8e7bfa51036a84e923fa06e42bbed3cd7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/812438
(cherry picked from commit 98cb259c87e9531b0a21dfd3132a3f3db07ff6f0)
Reviewed-on: http://git-master/r/831515
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
index d6fca6e4..91a4964c 100644
--- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
@@ -15,6 +15,8 @@
 
 #include <linux/types.h>
 
+#include <dt-bindings/memory/tegra-swgroup.h>
+
 #include "gk20a/gk20a.h"
 #include "gk20a/gk20a_allocator.h"
 #include "gm20b/ltc_gm20b.h"
@@ -149,7 +151,7 @@ static void gp10b_ltc_init_fs_state(struct gk20a *g)
         gm20b_ltc_init_fs_state(g);
 
         gk20a_writel(g, ltc_ltca_g_axi_pctrl_r(),
-                        ltc_ltca_g_axi_pctrl_user_sid_f(31));
+                        ltc_ltca_g_axi_pctrl_user_sid_f(TEGRA_SID_GPUB));
 }
 
 void gp10b_init_ltc(struct gpu_ops *gops)
@@ -172,4 +174,3 @@ void gp10b_init_ltc(struct gpu_ops *gops)
         gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs;
 #endif
 }
-