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authorSunny He <suhe@nvidia.com>2017-06-22 19:43:51 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-27 13:44:11 -0400
commit0dc80244eea4c7e504976d8028a3ddb72ba60b0e (patch)
tree99e87c3d5cab98a4593a7bb0fe2737d72ccfb805 /drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
parent773df3f5e9fdda028ade319990d1b672ce68592f (diff)
gpu: nvgpu: Reorganize ltc HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the ltc sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I1110e301e57b502cf7f97e6739424cb33cc52a69 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master/r/1507564 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/ltc_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/ltc_gp10b.c27
1 files changed, 4 insertions, 23 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
index d94e56ce..baa275c7 100644
--- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
@@ -27,7 +27,7 @@
27#include "gk20a/ltc_gk20a.h" 27#include "gk20a/ltc_gk20a.h"
28#include "ltc_gp10b.h" 28#include "ltc_gp10b.h"
29 29
30static int gp10b_determine_L2_size_bytes(struct gk20a *g) 30int gp10b_determine_L2_size_bytes(struct gk20a *g)
31{ 31{
32 u32 tmp; 32 u32 tmp;
33 int ret; 33 int ret;
@@ -47,7 +47,7 @@ static int gp10b_determine_L2_size_bytes(struct gk20a *g)
47 return ret; 47 return ret;
48} 48}
49 49
50static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) 50int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
51{ 51{
52 /* max memory size (MB) to cover */ 52 /* max memory size (MB) to cover */
53 u32 max_size = gr->max_comptag_mem; 53 u32 max_size = gr->max_comptag_mem;
@@ -188,7 +188,7 @@ void gp10b_ltc_isr(struct gk20a *g)
188 } 188 }
189} 189}
190 190
191static void gp10b_ltc_init_fs_state(struct gk20a *g) 191void gp10b_ltc_init_fs_state(struct gk20a *g)
192{ 192{
193 u32 ltc_intr; 193 u32 ltc_intr;
194 194
@@ -206,7 +206,7 @@ static void gp10b_ltc_init_fs_state(struct gk20a *g)
206} 206}
207 207
208#ifdef CONFIG_DEBUG_FS 208#ifdef CONFIG_DEBUG_FS
209static void gp10b_ltc_sync_debugfs(struct gk20a *g) 209void gp10b_ltc_sync_debugfs(struct gk20a *g)
210{ 210{
211 u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(); 211 u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f();
212 212
@@ -227,22 +227,3 @@ static void gp10b_ltc_sync_debugfs(struct gk20a *g)
227 nvgpu_spinlock_release(&g->debugfs_lock); 227 nvgpu_spinlock_release(&g->debugfs_lock);
228} 228}
229#endif 229#endif
230
231void gp10b_init_ltc(struct gpu_ops *gops)
232{
233 gops->ltc.determine_L2_size_bytes = gp10b_determine_L2_size_bytes;
234 gops->ltc.set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry;
235 gops->ltc.set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry;
236 gops->ltc.init_cbc = gm20b_ltc_init_cbc;
237
238 /* GM20b specific ops. */
239 gops->ltc.init_fs_state = gp10b_ltc_init_fs_state;
240 gops->ltc.init_comptags = gp10b_ltc_init_comptags;
241 gops->ltc.cbc_ctrl = gm20b_ltc_cbc_ctrl;
242 gops->ltc.isr = gp10b_ltc_isr;
243 gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config;
244 gops->ltc.flush = gm20b_flush_ltc;
245#ifdef CONFIG_DEBUG_FS
246 gops->ltc.sync_debugfs = gp10b_ltc_sync_debugfs;
247#endif
248}