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authorAlex Waterman <alexw@nvidia.com>2017-11-07 13:50:49 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-08 20:11:30 -0500
commit016231c045bfaa9f21feed00b88ac507c4935ebc (patch)
treeca6f41e1dfd89005c9716c13f1e9eb9404979274 /drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
parente7c45478895a359bd122b359c1f29b7e64116caf (diff)
gpu: nvgpu: Use only contig CBCs
Modify the LTC code to only use a contiguous CompBit Cache (CBC). The original code had two allocation schemes: "physical" and "virtual" - what they meant was virtually contiguous or physically contiguous. The CBC must appear contiguous to the GPU be it either from the IOMMU or from physical pages allocated contiguously. This change makes the CBC get allocated with the FORCE_CONTIGUOUS flag if the GPU is not IOMMU'able. If we can get contiguous mem with the IOMMU then no need to force the underlying pages to be contiguous. However, not all GPUs may be IOMMU'able so we do need to handle that case. Also delete the gk20a/ltc_gk20a.[ch] code. All that remained in these files was the CBC alloc functions which were completely chip agnostic. As a result these functions were consolidated and moved to common/ltc.c. Bug 2015747 Change-Id: I3f41961b4f94378b954e7502a6b27cf0bc627375 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593666 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/ltc_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/ltc_gp10b.c14
1 files changed, 5 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
index 9d878402..92a899b8 100644
--- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
@@ -24,16 +24,16 @@
24 24
25#include <dt-bindings/memory/tegra-swgroup.h> 25#include <dt-bindings/memory/tegra-swgroup.h>
26 26
27#include "gk20a/gk20a.h" 27#include <nvgpu/ltc.h>
28#include "gm20b/ltc_gm20b.h"
29
30#include <nvgpu/log.h> 28#include <nvgpu/log.h>
31#include <nvgpu/enabled.h> 29#include <nvgpu/enabled.h>
32 30
33#include <nvgpu/hw/gp10b/hw_mc_gp10b.h> 31#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
34#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h> 32#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h>
35 33
36#include "gk20a/ltc_gk20a.h" 34#include "gk20a/gk20a.h"
35#include "gm20b/ltc_gm20b.h"
36
37#include "ltc_gp10b.h" 37#include "ltc_gp10b.h"
38 38
39int gp10b_determine_L2_size_bytes(struct gk20a *g) 39int gp10b_determine_L2_size_bytes(struct gk20a *g)
@@ -112,11 +112,7 @@ int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
112 gk20a_dbg_info("gobs_per_comptagline_per_slice: %d", 112 gk20a_dbg_info("gobs_per_comptagline_per_slice: %d",
113 gobs_per_comptagline_per_slice); 113 gobs_per_comptagline_per_slice);
114 114
115 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) 115 err = nvgpu_ltc_alloc_cbc(g, compbit_backing_size);
116 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size);
117 else
118 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size);
119
120 if (err) 116 if (err)
121 return err; 117 return err;
122 118