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| author | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-10-06 15:45:15 -0400 |
|---|---|---|
| committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:09 -0500 |
| commit | 108c0ac8bdeb6b27a9ab8756137e5f58af0da9d1 (patch) | |
| tree | 4019f47d4e228a7b0b6865b50bdc1e1622677349 /drivers/gpu/nvgpu/gp10b/hw_therm_gp10b.h | |
| parent | fd624a1f4ef5207ef5fe0b70b063c08e7678ec2e (diff) | |
gpu: nvgpu: gp10b: Add tile caching registers
Add tile caching registers to access map.
Bug 1692373
Change-Id: Ic95fce02c564fa8d5556543a744c9828b542fb1f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/812352
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hw_therm_gp10b.h')
0 files changed, 0 insertions, 0 deletions