diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-10-27 03:47:25 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:02 -0500 |
commit | 07b7a534fa8d5e93420521fcb5e745acad386f00 (patch) | |
tree | f844c36ed9eea3731c5317cda19a1b7135e3e5b3 /drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h | |
parent | 1f3b9d851a0beb716596040f77b1431cc1fd8670 (diff) |
gpu: nvgpu: Synchronize gp10b headers with gm20b
Added all registers added to gk20a and gm20b to gp10b. Remove gp10b
trim registers, because they will not be accessed by CPU.
Bug 1567274
Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590312
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h index d76095ac..0de70b96 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_pwr_gp10b.h | |||
@@ -378,6 +378,18 @@ static inline u32 pwr_falcon_bootvec_vec_f(u32 v) | |||
378 | { | 378 | { |
379 | return (v & 0xffffffff) << 0; | 379 | return (v & 0xffffffff) << 0; |
380 | } | 380 | } |
381 | static inline u32 pwr_falcon_dmactl_r(void) | ||
382 | { | ||
383 | return 0x0010a10c; | ||
384 | } | ||
385 | static inline u32 pwr_falcon_dmactl_dmem_scrubbing_m(void) | ||
386 | { | ||
387 | return 0x1 << 1; | ||
388 | } | ||
389 | static inline u32 pwr_falcon_dmactl_imem_scrubbing_m(void) | ||
390 | { | ||
391 | return 0x1 << 2; | ||
392 | } | ||
381 | static inline u32 pwr_falcon_hwcfg_r(void) | 393 | static inline u32 pwr_falcon_hwcfg_r(void) |
382 | { | 394 | { |
383 | return 0x0010a108; | 395 | return 0x0010a108; |