gpu: nvgpu: Synchronize gp10b headers with gm20b

Added all registers added to gk20a and gm20b to gp10b. Remove gp10b
trim registers, because they will not be accessed by CPU.

Bug 1567274

Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590312
GVS: Gerrit_Virtual_Submit

1 files changed, 20 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h
index 5720cde1..91429b47 100644
--- a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h
@@ -174,6 +174,10 @@ static inline u32 pbdma_pb_header_type_inc_f(void)
 {
         return 0x20000000;
 }
+static inline u32 pbdma_hdr_shadow_r(u32 i)
+{
+        return 0x00040118 + i*8192;
+}
 static inline u32 pbdma_subdevice_r(u32 i)
 {
         return 0x00040094 + i*8192;
@@ -466,4 +470,20 @@ static inline u32 pbdma_syncpointb_syncpt_index_v(u32 r)
 {
         return (r >> 8) & 0xfff;
 }
+static inline u32 pbdma_runlist_timeslice_r(u32 i)
+{
+        return 0x000400f8 + i*8192;
+}
+static inline u32 pbdma_runlist_timeslice_timeout_128_f(void)
+{
+        return 0x80;
+}
+static inline u32 pbdma_runlist_timeslice_timescale_3_f(void)
+{
+        return 0x3000;
+}
+static inline u32 pbdma_runlist_timeslice_enable_true_f(void)
+{
+        return 0x10000000;
+}
 #endif