diff options
author | Adeel Raza <araza@nvidia.com> | 2014-10-02 23:39:32 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:01 -0500 |
commit | badee8f41a6304817b66287e39d81b382c575163 (patch) | |
tree | d7f603b53876032bf6d8fd6f86d825d6777493ed /drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h | |
parent | dfdd5ba3cbc52f7359188783159b103d1d2edcf2 (diff) |
gpu: nvgpu: headers for linsim CL 33688874
Bug 1561645
Change-Id: Iccd909d54fc5b1d1c8fbc903b5908bf6f7f22ec8
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/553151
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h | 32 |
1 files changed, 4 insertions, 28 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h index f45fdc99..83e06e8e 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h | |||
@@ -50,9 +50,9 @@ | |||
50 | #ifndef _hw_mc_gp10b_h_ | 50 | #ifndef _hw_mc_gp10b_h_ |
51 | #define _hw_mc_gp10b_h_ | 51 | #define _hw_mc_gp10b_h_ |
52 | 52 | ||
53 | static inline u32 mc_intr_0_r(void) | 53 | static inline u32 mc_intr_0_r(u32 i) |
54 | { | 54 | { |
55 | return 0x00000100; | 55 | return 0x00000100 + i*4; |
56 | } | 56 | } |
57 | static inline u32 mc_intr_0_pfifo_pending_f(void) | 57 | static inline u32 mc_intr_0_pfifo_pending_f(void) |
58 | { | 58 | { |
@@ -78,33 +78,9 @@ static inline u32 mc_intr_0_pbus_pending_f(void) | |||
78 | { | 78 | { |
79 | return 0x10000000; | 79 | return 0x10000000; |
80 | } | 80 | } |
81 | static inline u32 mc_intr_mask_0_r(void) | 81 | static inline u32 mc_intr_en_0_r(u32 i) |
82 | { | 82 | { |
83 | return 0x00000640; | 83 | return 0x00000140 + i*4; |
84 | } | ||
85 | static inline u32 mc_intr_mask_0_pmu_enabled_f(void) | ||
86 | { | ||
87 | return 0x1000000; | ||
88 | } | ||
89 | static inline u32 mc_intr_en_0_r(void) | ||
90 | { | ||
91 | return 0x00000140; | ||
92 | } | ||
93 | static inline u32 mc_intr_en_0_inta_disabled_f(void) | ||
94 | { | ||
95 | return 0x0; | ||
96 | } | ||
97 | static inline u32 mc_intr_en_0_inta_hardware_f(void) | ||
98 | { | ||
99 | return 0x1; | ||
100 | } | ||
101 | static inline u32 mc_intr_en_1_r(void) | ||
102 | { | ||
103 | return 0x00000144; | ||
104 | } | ||
105 | static inline u32 mc_intr_en_1_inta_disabled_f(void) | ||
106 | { | ||
107 | return 0x0; | ||
108 | } | 84 | } |
109 | static inline u32 mc_enable_r(void) | 85 | static inline u32 mc_enable_r(void) |
110 | { | 86 | { |