diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-10-27 03:47:25 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:02 -0500 |
commit | 07b7a534fa8d5e93420521fcb5e745acad386f00 (patch) | |
tree | f844c36ed9eea3731c5317cda19a1b7135e3e5b3 /drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h | |
parent | 1f3b9d851a0beb716596040f77b1431cc1fd8670 (diff) |
gpu: nvgpu: Synchronize gp10b headers with gm20b
Added all registers added to gk20a and gm20b to gp10b. Remove gp10b
trim registers, because they will not be accessed by CPU.
Bug 1567274
Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590312
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h index 00291d30..272f7fb3 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fuse_gp10b.h | |||
@@ -54,4 +54,48 @@ static inline u32 fuse_status_opt_tpc_gpc_r(u32 i) | |||
54 | { | 54 | { |
55 | return 0x00021c38 + i*4; | 55 | return 0x00021c38 + i*4; |
56 | } | 56 | } |
57 | static inline u32 fuse_ctrl_opt_tpc_gpc_r(u32 i) | ||
58 | { | ||
59 | return 0x00021838 + i*4; | ||
60 | } | ||
61 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_r(void) | ||
62 | { | ||
63 | return 0x00021944; | ||
64 | } | ||
65 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_f(u32 v) | ||
66 | { | ||
67 | return (v & 0x3) << 0; | ||
68 | } | ||
69 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_m(void) | ||
70 | { | ||
71 | return 0x3 << 0; | ||
72 | } | ||
73 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_v(u32 r) | ||
74 | { | ||
75 | return (r >> 0) & 0x3; | ||
76 | } | ||
77 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_r(void) | ||
78 | { | ||
79 | return 0x00021948; | ||
80 | } | ||
81 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_f(u32 v) | ||
82 | { | ||
83 | return (v & 0x1) << 0; | ||
84 | } | ||
85 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_m(void) | ||
86 | { | ||
87 | return 0x1 << 0; | ||
88 | } | ||
89 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_v(u32 r) | ||
90 | { | ||
91 | return (r >> 0) & 0x1; | ||
92 | } | ||
93 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f(void) | ||
94 | { | ||
95 | return 0x1; | ||
96 | } | ||
97 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_no_f(void) | ||
98 | { | ||
99 | return 0x0; | ||
100 | } | ||
57 | #endif | 101 | #endif |