gpu: nvgpu: Synchronize gp10b headers with gm20b

Added all registers added to gk20a and gm20b to gp10b. Remove gp10b
trim registers, because they will not be accessed by CPU.

Bug 1567274

Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590312
GVS: Gerrit_Virtual_Submit

1 files changed, 24 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h
index 9dacabce..d2ecdce1 100644
--- a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h
@@ -66,6 +66,10 @@ static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void)
 {
         return 0x0;
 }
+static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void)
+{
+        return 0x1;
+}
 static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r)
 {
         return (r >> 15) & 0x1;
@@ -78,6 +82,22 @@ static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r)
 {
         return (r >> 16) & 0xff;
 }
+static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_v(u32 r)
+{
+        return (r >> 11) & 0x1;
+}
+static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_true_f(void)
+{
+        return 0x800;
+}
+static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_false_f(void)
+{
+        return 0x0;
+}
+static inline u32 fb_priv_mmu_phy_secure_r(void)
+{
+        return 0x00100ce4;
+}
 static inline u32 fb_mmu_invalidate_pdb_r(void)
 {
         return 0x00100cb8;
@@ -158,9 +178,9 @@ static inline u32 fb_mmu_debug_wr_vol_true_f(void)
 {
         return 0x4;
 }
-static inline u32 fb_mmu_debug_wr_addr_v(u32 r)
+static inline u32 fb_mmu_debug_wr_addr_f(u32 v)
 {
-        return (r >> 4) & 0xfffffff;
+        return (v & 0xfffffff) << 4;
 }
 static inline u32 fb_mmu_debug_wr_addr_alignment_v(void)
 {
@@ -178,9 +198,9 @@ static inline u32 fb_mmu_debug_rd_vol_false_f(void)
 {
         return 0x0;
 }
-static inline u32 fb_mmu_debug_rd_addr_v(u32 r)
+static inline u32 fb_mmu_debug_rd_addr_f(u32 v)
 {
-        return (r >> 4) & 0xfffffff;
+        return (v & 0xfffffff) << 4;
 }
 static inline u32 fb_mmu_debug_rd_addr_alignment_v(void)
 {
@@ -202,10 +222,6 @@ static inline u32 fb_mmu_vpr_info_r(void)
 {
         return 0x00100cd0;
 }
-static inline u32 fb_mmu_vpr_info_fetch_f(u32 v)
-{
-        return (v & 0x1) << 2;
-}
 static inline u32 fb_mmu_vpr_info_fetch_v(u32 r)
 {
         return (r >> 2) & 0x1;