gpu: nvgpu: gp10b: add PRAMIN support for mem accessors

JIRA DNVGPU-23

Change-Id: I6f4a7018ebeb5c7928667148a52f779ca4938e47
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1148120
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h
index e8f7f3fb..02c06610 100644
--- a/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h
@@ -50,6 +50,30 @@
 #ifndef _hw_bus_gp10b_h_
 #define _hw_bus_gp10b_h_
 
+static inline u32 bus_bar0_window_r(void)
+{
+        return 0x00001700;
+}
+static inline u32 bus_bar0_window_base_f(u32 v)
+{
+        return (v & 0xffffff) << 0;
+}
+static inline u32 bus_bar0_window_target_vid_mem_f(void)
+{
+        return 0x0;
+}
+static inline u32 bus_bar0_window_target_sys_mem_coherent_f(void)
+{
+        return 0x2000000;
+}
+static inline u32 bus_bar0_window_target_sys_mem_noncoherent_f(void)
+{
+        return 0x3000000;
+}
+static inline u32 bus_bar0_window_target_bar0_window_base_shift_v(void)
+{
+        return 0x00000010;
+}
 static inline u32 bus_bar1_block_r(void)
 {
         return 0x00001704;