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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-03-09 17:10:00 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-16 12:17:22 -0400
commit95ef0315b99e32adbffc23bc8804a0127d3af10a (patch)
treed6e1dcfe05ceba5fc23bbb9d2aa6e5367c96a8f4 /drivers/gpu/nvgpu/gp10b/hal_gp10b.c
parent16ee09bb590d2c413d40a186743ecf003ac3c3d4 (diff)
gpu: nvgpu: Use GPU's own fuse registers
Read fuse values from GPU's own fuse registers instead of Tegra fuse registers whenever possible. This reduces the number of dependencies to Linux fuse code. Some fuses do not have a corresponding register in GPU, so they're left as is. Change-Id: Id9f2f4da897f3e20b20c300a67f705e3fa5ba35a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1318278 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hal_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 5fa1ec85..b57fcb5f 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -17,7 +17,6 @@
17#include <linux/printk.h> 17#include <linux/printk.h>
18#include <linux/version.h> 18#include <linux/version.h>
19#include <linux/types.h> 19#include <linux/types.h>
20#include <soc/tegra/fuse.h>
21 20
22#include "gk20a/gk20a.h" 21#include "gk20a/gk20a.h"
23#include "gk20a/dbg_gpu_gk20a.h" 22#include "gk20a/dbg_gpu_gk20a.h"
@@ -46,11 +45,7 @@
46#include "gp10b.h" 45#include "gp10b.h"
47 46
48#include <nvgpu/hw/gp10b/hw_proj_gp10b.h> 47#include <nvgpu/hw/gp10b/hw_proj_gp10b.h>
49 48#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
50#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
51#define FUSE_OPT_PRIV_SEC_EN_0 0x264
52#endif
53#define PRIV_SECURITY_ENABLED 0x01
54 49
55static struct gpu_ops gp10b_ops = { 50static struct gpu_ops gp10b_ops = {
56 .clock_gating = { 51 .clock_gating = {
@@ -205,8 +200,8 @@ int gp10b_init_hal(struct gk20a *g)
205 gops->privsecurity = 0; 200 gops->privsecurity = 0;
206 gops->securegpccs = 0; 201 gops->securegpccs = 0;
207 } else { 202 } else {
208 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0, &val); 203 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
209 if (val & PRIV_SECURITY_ENABLED) { 204 if (val) {
210 gops->privsecurity = 1; 205 gops->privsecurity = 1;
211 gops->securegpccs =1; 206 gops->securegpccs =1;
212 } else { 207 } else {
@@ -221,8 +216,8 @@ int gp10b_init_hal(struct gk20a *g)
221 gops->privsecurity = 0; 216 gops->privsecurity = 0;
222 gops->securegpccs = 0; 217 gops->securegpccs = 0;
223 } else { 218 } else {
224 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0, &val); 219 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
225 if (val & PRIV_SECURITY_ENABLED) { 220 if (val) {
226 gk20a_dbg_info("priv security is not supported but enabled"); 221 gk20a_dbg_info("priv security is not supported but enabled");
227 gops->privsecurity = 1; 222 gops->privsecurity = 1;
228 gops->securegpccs =1; 223 gops->securegpccs =1;