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authorShardar Shariff Md <smohammed@nvidia.com>2016-09-08 17:06:04 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:19 -0500
commit49840c15efb36b3216357b93ba0477e53dbef3b6 (patch)
tree054664e0231c2b4ab68959e419133adaa08dce47 /drivers/gpu/nvgpu/gp10b/hal_gp10b.c
parentff4884c0afc982286211632cd2e08036977b77a4 (diff)
gpu: nvgpu: change the usage of tegra_fuse_readl
tegra_fuse_readl() prototype is changed to match upstreamed fuse driver, so change implementation accordingly. Bug 200233653 Change-Id: Ib690cf8a5a69e7b13146471a5ee211834dc40086 Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-on: http://git-master/r/1217376 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hal_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index ec81cf35..c4e44483 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -190,6 +190,7 @@ int gp10b_init_hal(struct gk20a *g)
190 struct gpu_ops *gops = &g->ops; 190 struct gpu_ops *gops = &g->ops;
191 struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; 191 struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
192 struct gk20a_platform *platform = dev_get_drvdata(g->dev); 192 struct gk20a_platform *platform = dev_get_drvdata(g->dev);
193 u32 val;
193 194
194 *gops = gp10b_ops; 195 *gops = gp10b_ops;
195 196
@@ -198,8 +199,8 @@ int gp10b_init_hal(struct gk20a *g)
198 gops->privsecurity = 0; 199 gops->privsecurity = 0;
199 gops->securegpccs = 0; 200 gops->securegpccs = 0;
200 } else { 201 } else {
201 if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0) & 202 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0, &val);
202 PRIV_SECURITY_ENABLED) { 203 if (val & PRIV_SECURITY_ENABLED) {
203 gops->privsecurity = 1; 204 gops->privsecurity = 1;
204 gops->securegpccs =1; 205 gops->securegpccs =1;
205 } else { 206 } else {
@@ -214,8 +215,8 @@ int gp10b_init_hal(struct gk20a *g)
214 gops->privsecurity = 0; 215 gops->privsecurity = 0;
215 gops->securegpccs = 0; 216 gops->securegpccs = 0;
216 } else { 217 } else {
217 if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0) & 218 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0, &val);
218 PRIV_SECURITY_ENABLED) { 219 if (val & PRIV_SECURITY_ENABLED) {
219 gk20a_dbg_info("priv security is not supported but enabled"); 220 gk20a_dbg_info("priv security is not supported but enabled");
220 gops->privsecurity = 1; 221 gops->privsecurity = 1;
221 gops->securegpccs =1; 222 gops->securegpccs =1;