gpu: nvgpu: Implement SET_RD_COALESCE

Implement SW method SET_RD_COALESCE to implement correct handling
of texture read coalescing.

Bug 200223870

Change-Id: Icd6f987b72d78e5add4076fc550e2070eba70628
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1271303
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

1 files changed, 3 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
index 5338789f..0a70903f 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -1,7 +1,7 @@
 /*
  * GP10B GPU GR
  *
- * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -31,9 +31,11 @@ enum {
 #define NVC097_SET_GO_IDLE_TIMEOUT              0x022c
 #define NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE   0x02dc
 #define NVC097_SET_COALESCE_BUFFER_SIZE         0x1028
+#define NVC097_SET_RD_COALESCE                  0x102c
 #define NVC097_SET_CIRCULAR_BUFFER_SIZE         0x1280
 #define NVC097_SET_SHADER_EXCEPTIONS            0x1528
 #define NVC0C0_SET_SHADER_EXCEPTIONS            0x1528
+#define NVC0C0_SET_RD_COALESCE                  0x0228
 
 void gp10b_init_gr(struct gpu_ops *ops);
 int gr_gp10b_init_fs_state(struct gk20a *g);