diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2018-01-09 17:33:51 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-10 11:47:07 -0500 |
commit | e9de95d7e0629c40b5ceb56c07de319bedd3339f (patch) | |
tree | d48300e7b5191f732eaa5105049c9e4bfc81f2e9 /drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |
parent | 0ac3ba2a99b745f577c752ebf9a6b4291730a36d (diff) |
gpu: nvgpu: use chip specific zbc_c/z format reg
Use chip specific gpcs_swdx_dss_zbc_c_format_reg
and gpcs_swdx_dss_zbc_z_format_reg. These registers
are different for gv11b/gv100 from gp10b/gp106.
Change-Id: I9e209c878a11edc986ba4304ff60fcccbb5087aa
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1635091
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 3b0f0f2e..1d39a38b 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP10B GPU GR | 2 | * GP10B GPU GR |
3 | * | 3 | * |
4 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -77,6 +77,8 @@ int gr_gp10b_commit_global_cb_manager(struct gk20a *g, | |||
77 | void gr_gp10b_commit_global_pagepool(struct gk20a *g, | 77 | void gr_gp10b_commit_global_pagepool(struct gk20a *g, |
78 | struct channel_ctx_gk20a *ch_ctx, | 78 | struct channel_ctx_gk20a *ch_ctx, |
79 | u64 addr, u32 size, bool patch); | 79 | u64 addr, u32 size, bool patch); |
80 | u32 gr_gp10b_get_gpcs_swdx_dss_zbc_c_format_reg(struct gk20a *g); | ||
81 | u32 gr_gp10b_get_gpcs_swdx_dss_zbc_z_format_reg(struct gk20a *g); | ||
80 | int gr_gp10b_add_zbc_color(struct gk20a *g, struct gr_gk20a *gr, | 82 | int gr_gp10b_add_zbc_color(struct gk20a *g, struct gr_gk20a *gr, |
81 | struct zbc_entry *color_val, u32 index); | 83 | struct zbc_entry *color_val, u32 index); |
82 | int gr_gp10b_add_zbc_depth(struct gk20a *g, struct gr_gk20a *gr, | 84 | int gr_gp10b_add_zbc_depth(struct gk20a *g, struct gr_gk20a *gr, |