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author | Lauri Peltonen <lpeltonen@nvidia.com> | 2017-07-10 08:00:50 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-14 05:54:28 -0400 |
commit | d3415f27c465b057a828c51dba7d8c1f70f4d289 (patch) | |
tree | 83acf16739ef656c1bd1b8e95e4f4a650a6c8661 /drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |
parent | b1159ea6a19efdabe5205c654637f114e5f415bb (diff) |
gpu: nvgu: Support SET_BES_CROP_DEBUG3 sw method
The new SET_BES_CROP_DEBUG3 sw method is used to flip two fields
in the NV_PGRAPH_PRI_BES_CROP_DEBUG3 register. The sw method is
used by the user space driver to disable enough ROP optimizations
to maintain ZBC state of target tiles.
Bug 1942454
Change-Id: Id4e4d9d06c6c66080d06b6d4694546fe5cba8436
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1516202
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 76e48075..aac9eb65 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |||
@@ -37,6 +37,7 @@ enum { | |||
37 | #define NVC097_SET_RD_COALESCE 0x102c | 37 | #define NVC097_SET_RD_COALESCE 0x102c |
38 | #define NVC097_SET_CIRCULAR_BUFFER_SIZE 0x1280 | 38 | #define NVC097_SET_CIRCULAR_BUFFER_SIZE 0x1280 |
39 | #define NVC097_SET_SHADER_EXCEPTIONS 0x1528 | 39 | #define NVC097_SET_SHADER_EXCEPTIONS 0x1528 |
40 | #define NVC097_SET_BES_CROP_DEBUG3 0x10c4 | ||
40 | #define NVC0C0_SET_SHADER_EXCEPTIONS 0x1528 | 41 | #define NVC0C0_SET_SHADER_EXCEPTIONS 0x1528 |
41 | #define NVC0C0_SET_RD_COALESCE 0x0228 | 42 | #define NVC0C0_SET_RD_COALESCE 0x0228 |
42 | 43 | ||