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authorDeepak Nibade <dnibade@nvidia.com>2016-04-19 07:28:28 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:54:54 -0500
commit6113c679a99ca09256d33a582a4dfe648e100c23 (patch)
tree50a30eb1fc31daa10be5f382e99c8995b0df5978 /drivers/gpu/nvgpu/gp10b/gr_gp10b.h
parent5237f4a2a143a6410cc2eac04a62511a637fd321 (diff)
gpu: nvgpu: API to set preemption mode
Separate out new API gr_gp10b_set_ctxsw_preemption_mode() which will check requested preemption modes and take appropriate action for each preemption mode This API will also do some sanity checking for valid preemption modes and combinations Define API set_preemption_mode() for gp10b which will set the preemption modes passed as argument and then use gr_gp10b_set_ctxsw_preemption_mode() and update_ctxsw_preemption_mode() to update preemption mode Legacy path from gr_gp10b_alloc_gr_ctx() will convert flags NVGPU_ALLOC_OBJ_FLAGS_* into appropriate preemption modes and then call gr_gp10b_set_ctxsw_preemption_mode() New API set_preemption_mode() will use new flags NVGPU_GRAPHICS/COMPUTE_PREEMPTION_MODE_* and set and update ctxsw preemption mode In gr_gp10b_update_ctxsw_preemption_mode(), update graphics context to set CTA premption mode if mode NVGPU_COMPUTE_PREEMPTION_MODE_CTA is set Also, define preemption modes in nvgpu-t18x.h and use them everywhere Remove old definitions of modes from gr_gp10b.h Bug 1646259 Change-Id: Ib4dc1fb9933b15d32f0122a9e52665b69402df18 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1131806 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.h')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
index edf536f5..8c544f14 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -96,7 +96,4 @@ struct gr_ctx_desc_t18x {
96 bool cilp_preempt_pending; 96 bool cilp_preempt_pending;
97}; 97};
98 98
99#define NVGPU_GR_PREEMPTION_MODE_GFXP 1
100#define NVGPU_GR_PREEMPTION_MODE_CILP 3
101
102#endif 99#endif