gpu: nvgpu: Remove support for channel events

Remove support for events for bare channels. All users have already
moved to TSGs and TSG events.

Bug 1842197

Change-Id: Ib3ff68134ad9515ee761d0f0e19a3150a0b744ab
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1618906
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 8 insertions, 16 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 3b63626c..b5194223 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -1709,6 +1709,7 @@ int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g,
 {
         int ret;
         struct gr_ctx_desc *gr_ctx = fault_ch->ch_ctx.gr_ctx;
+        struct tsg_gk20a *tsg;
 
         gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "");
 
@@ -1773,15 +1774,10 @@ int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g,
         gr_ctx->cilp_preempt_pending = true;
         g->gr.cilp_preempt_pending_chid = fault_ch->chid;
 
-        if (gk20a_is_channel_marked_as_tsg(fault_ch)) {
-                struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid];
+        tsg = &g->fifo.tsg[fault_ch->tsgid];
 
-                gk20a_tsg_event_id_post_event(tsg,
-                                NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED);
-        } else {
-                gk20a_channel_event_id_post_event(fault_ch,
-                                NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED);
-        }
+        gk20a_tsg_event_id_post_event(tsg,
+                        NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED);
 
         return 0;
 }
@@ -1948,6 +1944,7 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g,
         struct channel_gk20a *ch;
         int chid = -1;
         int ret = 0;
+        struct tsg_gk20a *tsg;
 
         gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "");
 
@@ -1984,15 +1981,10 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g,
                 /* Post events to UMD */
                 gk20a_dbg_gpu_post_events(ch);
 
-                if (gk20a_is_channel_marked_as_tsg(ch)) {
-                        struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
+                tsg = &g->fifo.tsg[ch->tsgid];
 
-                        gk20a_tsg_event_id_post_event(tsg,
-                                NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE);
-                } else {
-                        gk20a_channel_event_id_post_event(ch,
-                                NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE);
-                }
+                gk20a_tsg_event_id_post_event(tsg,
+                        NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE);
 
                 gk20a_channel_put(ch);
         }