gpu: nvgpu: fix some MISRA 10.3 violations

Fix MISRA 10.3 violations in mclk_gp106.c. Cleanup cases where values
were being assigned to narrower types.

Changes in mclk_gp106.c required updates to other files to resolve
errors and prevent introducing new violations.

JIRA NVGPU-647

Change-Id: Ifdb03ad41d9dbf05dbcf79494ae8565fff6ee083
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809366
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 92e0165f..2fb700f0 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -2169,7 +2169,7 @@ int gr_gp10b_suspend_contexts(struct gk20a *g,
                 struct nvgpu_timeout timeout;
 
                 nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr,
-                        "CILP preempt pending, waiting %lu msecs for preemption",
+                        "CILP preempt pending, waiting %u msecs for preemption",
                         gk20a_get_gr_idle_timeout(g));
 
                 tsg = tsg_gk20a_from_ch(cilp_preempt_pending_ch);