diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-03-21 15:55:35 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-06 21:14:53 -0400 |
commit | c9665079d7b12f22a847c62587724b4ee120ca6e (patch) | |
tree | 7882bd08193db4c34b3b8ad7df7013339da2fba1 /drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |
parent | b69020bff5dfa69cad926c9374cdbe9a62509ffd (diff) |
gpu: nvgpu: rename mem_desc to nvgpu_mem
Renaming was done with the following command:
$ find -type f | \
xargs sed -i 's/struct mem_desc/struct nvgpu_mem/g'
Also rename mem_desc.[ch] to nvgpu_mem.[ch].
JIRA NVGPU-12
Change-Id: I69395758c22a56aa01e3dffbcded70a729bf559a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1325547
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index fc831e75..8e1517f6 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -832,7 +832,7 @@ static int gr_gp10b_init_ctx_state(struct gk20a *g) | |||
832 | } | 832 | } |
833 | 833 | ||
834 | int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, | 834 | int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, |
835 | struct mem_desc *mem) | 835 | struct nvgpu_mem *mem) |
836 | { | 836 | { |
837 | int err; | 837 | int err; |
838 | 838 | ||
@@ -1037,7 +1037,7 @@ fail_free_gk20a_ctx: | |||
1037 | static void dump_ctx_switch_stats(struct gk20a *g, struct vm_gk20a *vm, | 1037 | static void dump_ctx_switch_stats(struct gk20a *g, struct vm_gk20a *vm, |
1038 | struct gr_ctx_desc *gr_ctx) | 1038 | struct gr_ctx_desc *gr_ctx) |
1039 | { | 1039 | { |
1040 | struct mem_desc *mem = &gr_ctx->mem; | 1040 | struct nvgpu_mem *mem = &gr_ctx->mem; |
1041 | 1041 | ||
1042 | if (nvgpu_mem_begin(g, mem)) { | 1042 | if (nvgpu_mem_begin(g, mem)) { |
1043 | WARN_ON("Cannot map context"); | 1043 | WARN_ON("Cannot map context"); |
@@ -1108,7 +1108,7 @@ static void gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm, | |||
1108 | 1108 | ||
1109 | static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, | 1109 | static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, |
1110 | struct channel_ctx_gk20a *ch_ctx, | 1110 | struct channel_ctx_gk20a *ch_ctx, |
1111 | struct mem_desc *mem) | 1111 | struct nvgpu_mem *mem) |
1112 | { | 1112 | { |
1113 | struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; | 1113 | struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; |
1114 | u32 gfxp_preempt_option = | 1114 | u32 gfxp_preempt_option = |
@@ -2072,7 +2072,7 @@ static int gr_gp10b_set_boosted_ctx(struct channel_gk20a *ch, | |||
2072 | { | 2072 | { |
2073 | struct gr_ctx_desc *gr_ctx = ch->ch_ctx.gr_ctx; | 2073 | struct gr_ctx_desc *gr_ctx = ch->ch_ctx.gr_ctx; |
2074 | struct gk20a *g = ch->g; | 2074 | struct gk20a *g = ch->g; |
2075 | struct mem_desc *mem = &gr_ctx->mem; | 2075 | struct nvgpu_mem *mem = &gr_ctx->mem; |
2076 | int err = 0; | 2076 | int err = 0; |
2077 | 2077 | ||
2078 | gr_ctx->boosted_ctx = boost; | 2078 | gr_ctx->boosted_ctx = boost; |
@@ -2101,7 +2101,7 @@ unmap_ctx: | |||
2101 | return err; | 2101 | return err; |
2102 | } | 2102 | } |
2103 | 2103 | ||
2104 | static void gr_gp10b_update_boosted_ctx(struct gk20a *g, struct mem_desc *mem, | 2104 | static void gr_gp10b_update_boosted_ctx(struct gk20a *g, struct nvgpu_mem *mem, |
2105 | struct gr_ctx_desc *gr_ctx) { | 2105 | struct gr_ctx_desc *gr_ctx) { |
2106 | u32 v; | 2106 | u32 v; |
2107 | 2107 | ||
@@ -2119,7 +2119,7 @@ static int gr_gp10b_set_preemption_mode(struct channel_gk20a *ch, | |||
2119 | struct gk20a *g = ch->g; | 2119 | struct gk20a *g = ch->g; |
2120 | struct tsg_gk20a *tsg; | 2120 | struct tsg_gk20a *tsg; |
2121 | struct vm_gk20a *vm; | 2121 | struct vm_gk20a *vm; |
2122 | struct mem_desc *mem = &gr_ctx->mem; | 2122 | struct nvgpu_mem *mem = &gr_ctx->mem; |
2123 | u32 class; | 2123 | u32 class; |
2124 | int err = 0; | 2124 | int err = 0; |
2125 | 2125 | ||