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author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2017-09-18 14:06:09 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-19 20:45:28 -0400 |
commit | c4370d7deff6e3545157e06f51df2fef605a18cc (patch) | |
tree | def6acc583226bade58338ff1ac869636c6d88e0 /drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |
parent | c03ccd89c24572dcb65bdfc8d9ab5eb76da28c96 (diff) |
gpu: nvgpu: Initialize ctxsw header counters
Initialize following counters in context header
for all legacy chips:
ctxsw_prog_main_image_num_save_ops
ctxsw_prog_main_image_num_restore_ops
This was already present in the code but move to a function
gk20a_gr_init_ctxsw_hdr_data, so that it can be re-used across
chips.
Additionally initialize following preemption related counters
for gp10b onwards in context header:
ctxsw_prog_main_image_num_wfi_save_ops
ctxsw_prog_main_image_num_cta_save_ops
ctxsw_prog_main_image_num_gfxp_save_ops
ctxsw_prog_main_image_num_cilp_save_ops
Bug 1958308
Change-Id: I0e45ec718a8f9ddb951b52c92137051b4f6a8c60
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1562654
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index ee7118e7..d3e45f55 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -2379,3 +2379,17 @@ int gr_gp10b_set_czf_bypass(struct gk20a *g, struct channel_gk20a *ch) | |||
2379 | 2379 | ||
2380 | return __gr_gk20a_exec_ctx_ops(ch, &ops, 1, 1, 0, false); | 2380 | return __gr_gk20a_exec_ctx_ops(ch, &ops, 1, 1, 0, false); |
2381 | } | 2381 | } |
2382 | |||
2383 | void gr_gp10b_init_ctxsw_hdr_data(struct gk20a *g, struct nvgpu_mem *mem) | ||
2384 | { | ||
2385 | gk20a_gr_init_ctxsw_hdr_data(g, mem); | ||
2386 | |||
2387 | nvgpu_mem_wr(g, mem, | ||
2388 | ctxsw_prog_main_image_num_wfi_save_ops_o(), 0); | ||
2389 | nvgpu_mem_wr(g, mem, | ||
2390 | ctxsw_prog_main_image_num_cta_save_ops_o(), 0); | ||
2391 | nvgpu_mem_wr(g, mem, | ||
2392 | ctxsw_prog_main_image_num_gfxp_save_ops_o(), 0); | ||
2393 | nvgpu_mem_wr(g, mem, | ||
2394 | ctxsw_prog_main_image_num_cilp_save_ops_o(), 0); | ||
2395 | } | ||