gpu: nvgpu: Use nvgpu_timeout for all loops

There were still a few remaining loops where we did not use
nvgpu_timeout and required Tegra specific functions for detecting if
timeout should be skipped. Replace all of them with nvgpu_timeout and
remove including chip-id.h where possible.

FE power mode timeout loop also used wrong delay value. It always
waited for the whole max timeout instead of looping with smaller
increments.

If SEC2 ACR boot fails to halt, we should not try to check ACR result
from mailbox. Add an early return for that case.

JIRA NVGPU-16

Change-Id: I9f0984250d7d01785755338e39822e6631dcaa5a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323227

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 7f43a6ce..cb6ef9c7 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -2041,21 +2041,21 @@ static int gr_gp10b_suspend_contexts(struct gk20a *g,
                 struct channel_ctx_gk20a *ch_ctx =
                                 &cilp_preempt_pending_ch->ch_ctx;
                 struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx;
-                unsigned long end_jiffies = jiffies +
-                        msecs_to_jiffies(gk20a_get_gr_idle_timeout(g));
+                struct nvgpu_timeout timeout;
 
                 gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr,
                         "CILP preempt pending, waiting %lu msecs for preemption",
                         gk20a_get_gr_idle_timeout(g));
 
+                nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g),
+                                   NVGPU_TIMER_CPU_TIMER);
                 do {
                         if (!gr_ctx->t18x.cilp_preempt_pending)
                                 break;
 
                         usleep_range(delay, delay * 2);
                         delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
-                } while (time_before(jiffies, end_jiffies)
-                        || !tegra_platform_is_silicon());
+                } while (!nvgpu_timeout_expired(&timeout));
 
                 /* If cilp is still pending at this point, timeout */
                 if (gr_ctx->t18x.cilp_preempt_pending)