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authorTerje Bergstrom <tbergstrom@nvidia.com>2015-09-18 11:16:23 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:52:08 -0500
commit959756873a2445c024df2f27c316b606a59e7e59 (patch)
tree5cec35a0b875f627c48fba6c7cee3cfabe2d6acd /drivers/gpu/nvgpu/gp10b/gr_gp10b.c
parenta982fab35152126e1ea072e40441a7e869bbbfff (diff)
gpu: nvgpu: gp10b: Fix spill buffer size
Spill buffer size is in chunks of 256B. Multiply the size by granularity to get the size in bytes. Bug 1686189 Change-Id: I0462293668322645bd1eab190c12faaeb6c316c1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/801344 (cherry picked from commit 4bf6de7d9c9014a9eaeff56b19437d1841d7cfb0) Reviewed-on: http://git-master/r/815680
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index c5f45816..61ecddef 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -510,7 +510,8 @@ static int gr_gp10b_alloc_gr_ctx(struct gk20a *g,
510 510
511 if (flags & NVGPU_ALLOC_OBJ_FLAGS_GFXP) { 511 if (flags & NVGPU_ALLOC_OBJ_FLAGS_GFXP) {
512 u32 spill_size = 512 u32 spill_size =
513 gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v(); 513 gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() *
514 gr_gpc0_swdx_rm_spill_buffer_size_256b_byte_granularity_v();
514 u32 pagepool_size = g->ops.gr.pagepool_default_size(g) * 515 u32 pagepool_size = g->ops.gr.pagepool_default_size(g) *
515 gr_scc_pagepool_total_pages_byte_granularity_v(); 516 gr_scc_pagepool_total_pages_byte_granularity_v();
516 u32 betacb_size = g->gr.attrib_cb_default_size + 517 u32 betacb_size = g->gr.attrib_cb_default_size +
@@ -694,7 +695,8 @@ static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g,
694 gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v()) | 695 gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v()) |
695 (u64_hi32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) << 696 (u64_hi32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) <<
696 (32 - gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v())); 697 (32 - gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v()));
697 size = gr_ctx->t18x.spill_ctxsw_buffer.size; 698 size = gr_ctx->t18x.spill_ctxsw_buffer.size /
699 gr_gpc0_swdx_rm_spill_buffer_size_256b_byte_granularity_v();
698 700
699 gr_gk20a_ctx_patch_write(g, ch_ctx, 701 gr_gk20a_ctx_patch_write(g, ch_ctx,
700 gr_gpc0_swdx_rm_spill_buffer_addr_r(), 702 gr_gpc0_swdx_rm_spill_buffer_addr_r(),