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authorTerje Bergstrom <tbergstrom@nvidia.com>2015-06-04 12:17:50 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:52:06 -0500
commit888a27706b1285b7482e49143ac50f8d08551d84 (patch)
treefbb86e7ca9b238797a8e8fa9e6cfd0b7df0ebba7 /drivers/gpu/nvgpu/gp10b/gr_gp10b.c
parent4e55cfd9959c5468de7584306c68bb2d2bae1a4b (diff)
gpu: nvgpu: gp10b: Program TEX RM registers
Program CB base to new gp10b registers. Change-Id: I1ab39a487dade58d3a024fb1aba1af5c878f31bb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/752634
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 240bab81..973653a0 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -844,6 +844,34 @@ static int gr_gp10b_wait_empty(struct gk20a *g, unsigned long end_jiffies,
844 return -EAGAIN; 844 return -EAGAIN;
845} 845}
846 846
847static void gr_gp10b_commit_global_attrib_cb(struct gk20a *g,
848 struct channel_ctx_gk20a *ch_ctx,
849 u64 addr, bool patch)
850{
851 struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx;
852 int attrBufferSize;
853
854 if (gr_ctx->t18x.preempt_ctxsw_buffer.gpu_va)
855 attrBufferSize = gr_ctx->t18x.preempt_ctxsw_buffer.size;
856 else
857 attrBufferSize = g->ops.gr.calc_global_ctx_buffer_size(g);
858
859 attrBufferSize /= gr_gpcs_tpcs_tex_rm_cb_1_size_div_128b_granularity_f();
860
861 gr_gm20b_commit_global_attrib_cb(g, ch_ctx, addr, patch);
862
863 gr_gk20a_ctx_patch_write(g, ch_ctx, gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_r(),
864 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_v_f(addr) |
865 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_valid_true_f(), patch);
866
867 gr_gk20a_ctx_patch_write(g, ch_ctx, gr_gpcs_tpcs_tex_rm_cb_0_r(),
868 gr_gpcs_tpcs_tex_rm_cb_0_base_addr_43_12_f(addr), patch);
869
870 gr_gk20a_ctx_patch_write(g, ch_ctx, gr_gpcs_tpcs_tex_rm_cb_1_r(),
871 gr_gpcs_tpcs_tex_rm_cb_1_size_div_128b_f(attrBufferSize) |
872 gr_gpcs_tpcs_tex_rm_cb_1_valid_true_f(), patch);
873}
874
847void gp10b_init_gr(struct gpu_ops *gops) 875void gp10b_init_gr(struct gpu_ops *gops)
848{ 876{
849 gm20b_init_gr(gops); 877 gm20b_init_gr(gops);
@@ -855,6 +883,7 @@ void gp10b_init_gr(struct gpu_ops *gops)
855 gops->gr.pagepool_default_size = gr_gp10b_pagepool_default_size; 883 gops->gr.pagepool_default_size = gr_gp10b_pagepool_default_size;
856 gops->gr.calc_global_ctx_buffer_size = 884 gops->gr.calc_global_ctx_buffer_size =
857 gr_gp10b_calc_global_ctx_buffer_size; 885 gr_gp10b_calc_global_ctx_buffer_size;
886 gops->gr.commit_global_attrib_cb = gr_gp10b_commit_global_attrib_cb;
858 gops->gr.handle_sw_method = gr_gp10b_handle_sw_method; 887 gops->gr.handle_sw_method = gr_gp10b_handle_sw_method;
859 gops->gr.cb_size_default = gr_gp10b_cb_size_default; 888 gops->gr.cb_size_default = gr_gp10b_cb_size_default;
860 gops->gr.set_alpha_circular_buffer_size = 889 gops->gr.set_alpha_circular_buffer_size =