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authorAlex Waterman <alexw@nvidia.com>2017-03-21 18:34:50 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-06 21:15:04 -0400
commit50667e097b2be567e3d2f95e23b046243bca2bf6 (patch)
treee8fc42261868c6d69844f2e92fce33f6169434d4 /drivers/gpu/nvgpu/gp10b/gr_gp10b.c
parent8f2d4a3f4a0acc81bae6725d30506e92651a42b5 (diff)
gpu: nvgpu: Rename nvgpu DMA APIs
Rename the nvgpu DMA APIs from gk20a_gmmu_alloc* to nvgpu_dma_alloc*. This better reflects the purpose of the APIs (to allocate DMA suitable memory) and avoids confusion with GMMU related code. JIRA NVGPU-12 Change-Id: I673d607db56dd6e44f02008dc7b5293209ef67bf Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1325548 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index b9367120..c1cb1376 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -839,7 +839,7 @@ int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size,
839 839
840 gk20a_dbg_fn(""); 840 gk20a_dbg_fn("");
841 841
842 err = gk20a_gmmu_alloc_sys(vm->mm->g, size, mem); 842 err = nvgpu_dma_alloc_sys(vm->mm->g, size, mem);
843 if (err) 843 if (err)
844 return err; 844 return err;
845 845
@@ -859,7 +859,7 @@ int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size,
859 return 0; 859 return 0;
860 860
861fail_free: 861fail_free:
862 gk20a_gmmu_free(vm->mm->g, mem); 862 nvgpu_dma_free(vm->mm->g, mem);
863 return err; 863 return err;
864} 864}
865 865
@@ -980,11 +980,11 @@ static int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g,
980 return 0; 980 return 0;
981 981
982fail_free_betacb: 982fail_free_betacb:
983 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.betacb_ctxsw_buffer); 983 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.betacb_ctxsw_buffer);
984fail_free_spill: 984fail_free_spill:
985 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.spill_ctxsw_buffer); 985 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.spill_ctxsw_buffer);
986fail_free_preempt: 986fail_free_preempt:
987 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.preempt_ctxsw_buffer); 987 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.preempt_ctxsw_buffer);
988fail: 988fail:
989 return err; 989 return err;
990} 990}
@@ -1098,10 +1098,10 @@ static void gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
1098 if (g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close) 1098 if (g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close)
1099 dump_ctx_switch_stats(g, vm, gr_ctx); 1099 dump_ctx_switch_stats(g, vm, gr_ctx);
1100 1100
1101 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.pagepool_ctxsw_buffer); 1101 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.pagepool_ctxsw_buffer);
1102 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.betacb_ctxsw_buffer); 1102 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.betacb_ctxsw_buffer);
1103 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.spill_ctxsw_buffer); 1103 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.spill_ctxsw_buffer);
1104 gk20a_gmmu_unmap_free(vm, &gr_ctx->t18x.preempt_ctxsw_buffer); 1104 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.preempt_ctxsw_buffer);
1105 gr_gk20a_free_gr_ctx(g, vm, gr_ctx); 1105 gr_gk20a_free_gr_ctx(g, vm, gr_ctx);
1106 gk20a_dbg_fn("done"); 1106 gk20a_dbg_fn("done");
1107} 1107}