gpu: nvgpu: gp10b: define fuse macro depend on kernel version

- Define fuse macros depending on kernel version as fuse
  offset got changed in K4.4 and for K4.4 fuse defines are
  defined in common header file (tegra-fuse.h)
- Use fuse control read/write APIs when reading control
  registers for K4.4

Bug 200243956

Change-Id: I34dabd1a307d10010cb89ac6a5f1e3f5b177c0fc
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1245825
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 0705d8b6..09c2558c 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -17,6 +17,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/tegra-fuse.h>
+#include <linux/version.h>
 
 #include <dt-bindings/soc/gm20b-fuse.h>
 #include <dt-bindings/soc/gp10b-fuse.h>
@@ -1533,8 +1534,13 @@ static void gr_gp10b_init_cyclestats(struct gk20a *g)
 
 static void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
 {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
         tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0);
         tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0);
+#else
+        tegra_fuse_control_write(0x1, FUSE_FUSEBYPASS_0);
+        tegra_fuse_control_write(0x0, FUSE_WRITE_ACCESS_SW_0);
+#endif
 
         if (g->gr.gpc_tpc_mask[gpc_index] == 0x1)
                 tegra_fuse_writel(0x2, FUSE_OPT_GPU_TPC0_DISABLE_0);