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author | Sandeep Shinde <sashinde@nvidia.com> | 2017-08-24 02:42:42 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-07 23:07:13 -0400 |
commit | 33f192b2f781007fb7f9598613ce3811f3f39237 (patch) | |
tree | e0d559b108b97f01db020ec257b45eded289a02c /drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |
parent | 70c4496ca7add205f604c5c7fec8c16033394ba0 (diff) |
gpu: nvgpu: Add pd_max_batches sysfs node for gp10b
Add a new sysfs node pd_max_batches for setting max batches value in
NV_PGRAPH_PRI_PD_AB_DIST_CONFIG_1_MAX_BATCHES register which controls
max number of batches per alpha-beta transition stored in PD.
Bug 1927124
Change-Id: I2817f2d70dab348d8b0b8ba19bf1e9b9d23ca907
Signed-off-by: Sandeep Shinde <sashinde@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1544104
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit aa4daddda23aa44a84464200f497eac802a8e6ce)
Reviewed-on: https://git-master.nvidia.com/r/1543355
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 74af9817..ee7118e7 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -420,9 +420,15 @@ int gr_gp10b_commit_global_cb_manager(struct gk20a *g, | |||
420 | gr_gpc0_ppc0_cbm_beta_cb_size_v_granularity_v()) / | 420 | gr_gpc0_ppc0_cbm_beta_cb_size_v_granularity_v()) / |
421 | gr_pd_ab_dist_cfg1_max_output_granularity_v(); | 421 | gr_pd_ab_dist_cfg1_max_output_granularity_v(); |
422 | 422 | ||
423 | gr_gk20a_ctx_patch_write(g, ch_ctx, gr_pd_ab_dist_cfg1_r(), | 423 | if (g->gr.pd_max_batches) { |
424 | gr_pd_ab_dist_cfg1_max_output_f(pd_ab_max_output) | | 424 | gr_gk20a_ctx_patch_write(g, ch_ctx, gr_pd_ab_dist_cfg1_r(), |
425 | gr_pd_ab_dist_cfg1_max_batches_init_f(), patch); | 425 | gr_pd_ab_dist_cfg1_max_output_f(pd_ab_max_output) | |
426 | gr_pd_ab_dist_cfg1_max_batches_f(g->gr.pd_max_batches), patch); | ||
427 | } else { | ||
428 | gr_gk20a_ctx_patch_write(g, ch_ctx, gr_pd_ab_dist_cfg1_r(), | ||
429 | gr_pd_ab_dist_cfg1_max_output_f(pd_ab_max_output) | | ||
430 | gr_pd_ab_dist_cfg1_max_batches_init_f(), patch); | ||
431 | } | ||
426 | 432 | ||
427 | attrib_offset_in_chunk = alpha_offset_in_chunk + | 433 | attrib_offset_in_chunk = alpha_offset_in_chunk + |
428 | gr->tpc_count * gr->alpha_cb_size; | 434 | gr->tpc_count * gr->alpha_cb_size; |
@@ -751,9 +757,15 @@ void gr_gp10b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data) | |||
751 | gr_gpc0_ppc0_cbm_alpha_cb_size_v_granularity_v() / | 757 | gr_gpc0_ppc0_cbm_alpha_cb_size_v_granularity_v() / |
752 | gr_pd_ab_dist_cfg1_max_output_granularity_v(); | 758 | gr_pd_ab_dist_cfg1_max_output_granularity_v(); |
753 | 759 | ||
754 | gk20a_writel(g, gr_pd_ab_dist_cfg1_r(), | 760 | if (g->gr.pd_max_batches) { |
755 | gr_pd_ab_dist_cfg1_max_output_f(pd_ab_max_output) | | 761 | gk20a_writel(g, gr_pd_ab_dist_cfg1_r(), |
756 | gr_pd_ab_dist_cfg1_max_batches_init_f()); | 762 | gr_pd_ab_dist_cfg1_max_output_f(pd_ab_max_output) | |
763 | gr_pd_ab_dist_cfg1_max_batches_f(g->gr.pd_max_batches)); | ||
764 | } else { | ||
765 | gk20a_writel(g, gr_pd_ab_dist_cfg1_r(), | ||
766 | gr_pd_ab_dist_cfg1_max_output_f(pd_ab_max_output) | | ||
767 | gr_pd_ab_dist_cfg1_max_batches_init_f()); | ||
768 | } | ||
757 | 769 | ||
758 | for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) { | 770 | for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) { |
759 | stride = gpc_stride * gpc_index; | 771 | stride = gpc_stride * gpc_index; |