diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2016-05-31 08:39:08 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:16 -0500 |
commit | 85f579c6e57bdfcab18b01e6dba5854e5bc308ae (patch) | |
tree | 43048933b3e1fe5ac4e017d839c7d28239930f1f /drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | |
parent | ba949fd8af16283e9712541ed69eaffcc35ed38c (diff) |
gpu: nvgpu: use correct APIs for disable and preempt
In gr_gp10b_set_preemption_mode() and in gp10b_fifo_resetup_ramfc(),
we call channel specific APIs to disable/preempt/enable channel
But we do not consider TSGs in this case
Hence use correct (below) APIs in above function which
will handle channel or TSG internally :
gk20a_disable_channel_tsg()
gk20a_fifo_preempt()
gk20a_enable_channel_tsg()
Bug 200205041
Change-Id: I2369e79b2af3b8a91699044106293865d5f8f260
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1157192
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/fifo_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index 89b5527d..aa38dc54 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | |||
@@ -156,10 +156,10 @@ static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c) | |||
156 | 156 | ||
157 | if (new_syncpt && new_syncpt != old_syncpt) { | 157 | if (new_syncpt && new_syncpt != old_syncpt) { |
158 | /* disable channel */ | 158 | /* disable channel */ |
159 | c->g->ops.fifo.disable_channel(c); | 159 | gk20a_disable_channel_tsg(c->g, c); |
160 | 160 | ||
161 | /* preempt the channel */ | 161 | /* preempt the channel */ |
162 | WARN_ON(c->g->ops.fifo.preempt_channel(c->g, c->hw_chid)); | 162 | WARN_ON(gk20a_fifo_preempt(c->g, c)); |
163 | 163 | ||
164 | v = pbdma_allowed_syncpoints_0_valid_f(1); | 164 | v = pbdma_allowed_syncpoints_0_valid_f(1); |
165 | 165 | ||
@@ -173,9 +173,7 @@ static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c) | |||
173 | } | 173 | } |
174 | 174 | ||
175 | /* enable channel */ | 175 | /* enable channel */ |
176 | gk20a_writel(c->g, ccsr_channel_r(c->hw_chid), | 176 | gk20a_enable_channel_tsg(c->g, c); |
177 | gk20a_readl(c->g, ccsr_channel_r(c->hw_chid)) | | ||
178 | ccsr_channel_enable_set_true_f()); | ||
179 | 177 | ||
180 | gk20a_dbg_fn("done"); | 178 | gk20a_dbg_fn("done"); |
181 | 179 | ||