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authorLakshmanan M <lm@nvidia.com>2016-06-22 06:37:46 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:17 -0500
commit528758f488a8f39c1306d8c17be4799273a94a5d (patch)
tree2d9f74b31ebafa53ada34720feb50ad9e09b78f4 /drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
parentd4eb7f691ef14263377c0f33777b104e2b1a0c53 (diff)
gpu: nvgpu: Add interface for privileged channel allocation
Added interface for privileged channel allocation to execute the privileged method (ex. CE phys mode transfer). JIRA DNVGPU-53 Change-Id: I1606f8c9d10f29d5a10738b5110ce9f6a2bb428d Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1169320 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/fifo_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/fifo_gp10b.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
index 0aa6e29e..349f25fc 100644
--- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
@@ -132,6 +132,14 @@ static int channel_gp10b_setup_ramfc(struct channel_gk20a *c,
132 132
133 gk20a_mem_wr32(g, mem, ram_fc_chid_w(), ram_fc_chid_id_f(c->hw_chid)); 133 gk20a_mem_wr32(g, mem, ram_fc_chid_w(), ram_fc_chid_id_f(c->hw_chid));
134 134
135 if (c->is_privileged_channel) {
136 /* Set privilege level for channel */
137 gk20a_mem_wr32(g, mem, ram_fc_config_w(),
138 pbdma_config_auth_level_privileged_f());
139
140 gk20a_channel_setup_ramfc_for_privileged_channel(c);
141 }
142
135 return channel_gp10b_commit_userd(c); 143 return channel_gp10b_commit_userd(c);
136} 144}
137 145