summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2016-05-13 15:22:21 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:15 -0500
commit1f225fa73167ec31c9332e4031c156d8b04a41f6 (patch)
treee8fe7949af669bf7bd7bfaf0766946d63b079303 /drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
parent2580fa57fb4d1c0b6c002bade851a358ac867b24 (diff)
gpu: nvgpu: Implement engine_enum_from_type
Implement a helper function engine_enum_from_type. This allows parsing device_info entries for LCE engine type. Pascal has logical copy engine instead of CE2, so so add definition of that. Change-Id: I71f59c308641d84ac59fd57fc37d9b627bb07a43 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1147747 Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/fifo_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/fifo_gp10b.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
index 4766e0e4..45de221e 100644
--- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
@@ -23,6 +23,7 @@
23#include "hw_ccsr_gp10b.h" 23#include "hw_ccsr_gp10b.h"
24#include "hw_fifo_gp10b.h" 24#include "hw_fifo_gp10b.h"
25#include "hw_ram_gp10b.h" 25#include "hw_ram_gp10b.h"
26#include "hw_top_gp10b.h"
26 27
27static void gp10b_set_pdb_fault_replay_flags(struct gk20a *g, 28static void gp10b_set_pdb_fault_replay_flags(struct gk20a *g,
28 struct mem_desc *mem) 29 struct mem_desc *mem)
@@ -181,10 +182,26 @@ static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c)
181 return 0; 182 return 0;
182} 183}
183 184
185static int gp10b_fifo_engine_enum_from_type(struct gk20a *g, u32 engine_type)
186{
187 int ret = ENGINE_INVAL_GK20A;
188
189 gk20a_dbg_info("engine type %d", engine_type);
190 if (engine_type == top_device_info_type_enum_graphics_v())
191 ret = ENGINE_GR_GK20A;
192 else if (engine_type == top_device_info_type_enum_lce_v())
193 ret = ENGINE_CE2_GK20A;
194 else
195 gk20a_err(g->dev, "unknown engine %d", engine_type);
196
197 return ret;
198}
199
184void gp10b_init_fifo(struct gpu_ops *gops) 200void gp10b_init_fifo(struct gpu_ops *gops)
185{ 201{
186 gm20b_init_fifo(gops); 202 gm20b_init_fifo(gops);
187 gops->fifo.setup_ramfc = channel_gp10b_setup_ramfc; 203 gops->fifo.setup_ramfc = channel_gp10b_setup_ramfc;
188 gops->fifo.get_pbdma_signature = gp10b_fifo_get_pbdma_signature; 204 gops->fifo.get_pbdma_signature = gp10b_fifo_get_pbdma_signature;
189 gops->fifo.resetup_ramfc = gp10b_fifo_resetup_ramfc; 205 gops->fifo.resetup_ramfc = gp10b_fifo_resetup_ramfc;
206 gops->fifo.engine_enum_from_type = gp10b_fifo_engine_enum_from_type;
190} 207}