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authorThomas Fleury <tfleury@nvidia.com>2016-02-15 05:15:19 -0500
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:52:11 -0500
commitf7872bec493d285d1f8a2c0bda69d9247f932b27 (patch)
tree72341fde584fc596207ac708b3f9358348f2227f /drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c
parent9864f1b0773c079f4517f3bfadddd24b1d5859a6 (diff)
gpu: nvpgu: setup fecs_trace hal operations
bug 1648908 Change-Id: I630f74f09e0a4143f5028c88634b9793ec86b279 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1022730 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c b/drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c
new file mode 100644
index 00000000..7dd200a9
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c
@@ -0,0 +1,53 @@
1/*
2 * GP10B GPU FECS traces
3 *
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include "gk20a/gk20a.h"
17#include "gk20a/fecs_trace_gk20a.h"
18#include "gp10b/hw_ctxsw_prog_gp10b.h"
19#include "gp10b/hw_gr_gp10b.h"
20
21#ifdef CONFIG_GK20A_CTXSW_TRACE
22static int gp10b_fecs_trace_flush(struct gk20a *g)
23{
24 struct fecs_method_op_gk20a op = {
25 .mailbox = { .id = 0, .data = 0,
26 .clr = ~0, .ok = 0, .fail = 0},
27 .method.addr = gr_fecs_method_push_adr_write_timestamp_record_v(),
28 .method.data = 0,
29 .cond.ok = GR_IS_UCODE_OP_NOT_EQUAL,
30 .cond.fail = GR_IS_UCODE_OP_SKIP,
31 };
32 int err;
33
34 gk20a_dbg(gpu_dbg_fn|gpu_dbg_ctxsw, "");
35
36 err = gr_gk20a_elpg_protected_call(g,
37 gr_gk20a_submit_fecs_method_op(g, op, false));
38 if (err)
39 gk20a_err(dev_from_gk20a(g), "write timestamp record failed");
40
41 return err;
42}
43
44void gp10b_init_fecs_trace_ops(struct gpu_ops *ops)
45{
46 gk20a_init_fecs_trace_ops(ops);
47 ops->fecs_trace.flush = gp10b_fecs_trace_flush;
48}
49#else
50void gp10b_init_fecs_trace_ops(struct gpu_ops *ops)
51{
52}
53#endif /* CONFIG_GK20A_CTXSW_TRACE */