gpu: nvgpu: gp10b: clear ce isr before wakeup

In gp10b_ce_nonstall_isr(), we trigger a semaphore wakeup.
Currently, we clear the interrupt status register after the
wakeup is complete. There is potential for an interrupt to
come in while the wake-up operation is in progress, and it
is possible that:

1) We miss processing the interrupt in that ISR iteration AND
2) We clear the interrupt status register anyways

This change clears the status register before triggering wakeup,
so the interrupt will properly re-fire.

Bug 200244458

Change-Id: Ia3338252eeea4eb60d11c0e241279989a46dac04
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1253107
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 7 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/ce_gp10b.c b/drivers/gpu/nvgpu/gp10b/ce_gp10b.c
index a35c9817..e5082778 100644
--- a/drivers/gpu/nvgpu/gp10b/ce_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ce_gp10b.c
@@ -20,13 +20,13 @@
 #include "hw_ce_gp10b.h"
 #include "ce_gp10b.h"
 
-static u32 ce_nonblockpipe_isr(struct gk20a *g, u32 fifo_intr)
+static void ce_nonblockpipe_isr(struct gk20a *g, u32 fifo_intr)
 {
         gk20a_dbg(gpu_dbg_intr, "ce non-blocking pipe interrupt\n");
 
         /* wake theads waiting in this channel */
         gk20a_channel_semaphore_wakeup(g, true);
-        return ce_intr_status_nonblockpipe_pending_f();
+        return;
 }
 
 static u32 ce_blockpipe_isr(struct gk20a *g, u32 fifo_intr)
@@ -64,14 +64,14 @@ static void gp10b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base)
 static void gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base)
 {
         u32 ce_intr = gk20a_readl(g, ce_intr_status_r(inst_id));
-        u32 clear_intr = 0;
 
         gk20a_dbg(gpu_dbg_intr, "ce nonstall isr %08x %08x\n", ce_intr, inst_id);
 
-        if (ce_intr & ce_intr_status_nonblockpipe_pending_f())
-                clear_intr |= ce_nonblockpipe_isr(g, ce_intr);
-
-        gk20a_writel(g, ce_intr_status_r(inst_id), clear_intr);
+        if (ce_intr & ce_intr_status_nonblockpipe_pending_f()) {
+                gk20a_writel(g, ce_intr_status_r(inst_id),
+                        ce_intr_status_nonblockpipe_pending_f());
+                ce_nonblockpipe_isr(g, ce_intr);
+        }
 
         return;
 }