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authorSunny He <suhe@nvidia.com>2017-08-11 17:41:33 -0400
committerShu Zhong <shuz@nvidia.com>2017-08-11 17:57:15 -0400
commitf8399cfa553b6fb6d82c7fa762c372f03bf59d5f (patch)
tree3966af83cf9abdf687667afe120cc6648a9ed360 /drivers/gpu/nvgpu/gp106
parent8d63cd3995d4a650b478ad69d7e29ed2b1b2d927 (diff)
Revert "gpu: nvgpu: Reorg mm HAL initialization"
Conflicts with gv100 changes This reverts commit 8d63cd3995d4a650b478ad69d7e29ed2b1b2d927. Change-Id: Ie2f88d281b2b87a9a794d79164a61c4d883626b7 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1537668 Reviewed-by: Shu Zhong <shuz@nvidia.com> Tested-by: Shu Zhong <shuz@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c31
-rw-r--r--drivers/gpu/nvgpu/gp106/mm_gp106.c11
-rw-r--r--drivers/gpu/nvgpu/gp106/mm_gp106.h6
3 files changed, 13 insertions, 35 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index c919143c..361a7b0f 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -17,7 +17,6 @@
17#include "gk20a/fifo_gk20a.h" 17#include "gk20a/fifo_gk20a.h"
18#include "gk20a/ctxsw_trace_gk20a.h" 18#include "gk20a/ctxsw_trace_gk20a.h"
19#include "gk20a/fecs_trace_gk20a.h" 19#include "gk20a/fecs_trace_gk20a.h"
20#include "gk20a/mm_gk20a.h"
21#include "gk20a/dbg_gpu_gk20a.h" 20#include "gk20a/dbg_gpu_gk20a.h"
22#include "gk20a/css_gr_gk20a.h" 21#include "gk20a/css_gr_gk20a.h"
23#include "gk20a/bus_gk20a.h" 22#include "gk20a/bus_gk20a.h"
@@ -45,7 +44,6 @@
45#include "gm20b/ltc_gm20b.h" 44#include "gm20b/ltc_gm20b.h"
46#include "gm20b/gr_gm20b.h" 45#include "gm20b/gr_gm20b.h"
47#include "gm20b/fifo_gm20b.h" 46#include "gm20b/fifo_gm20b.h"
48#include "gm20b/mm_gm20b.h"
49#include "gm20b/pmu_gm20b.h" 47#include "gm20b/pmu_gm20b.h"
50#include "gm20b/fb_gm20b.h" 48#include "gm20b/fb_gm20b.h"
51 49
@@ -67,8 +65,6 @@
67 65
68#include "hal_gp106.h" 66#include "hal_gp106.h"
69 67
70#include "common/linux/platform_gk20a_tegra.h"
71
72#include <nvgpu/debug.h> 68#include <nvgpu/debug.h>
73#include <nvgpu/bug.h> 69#include <nvgpu/bug.h>
74#include <nvgpu/bus.h> 70#include <nvgpu/bus.h>
@@ -360,31 +356,6 @@ static const struct gpu_ops gp106_ops = {
360 .max_entries = gk20a_gr_max_entries, 356 .max_entries = gk20a_gr_max_entries,
361 }, 357 },
362#endif /* CONFIG_GK20A_CTXSW_TRACE */ 358#endif /* CONFIG_GK20A_CTXSW_TRACE */
363 .mm = {
364 .support_sparse = gm20b_mm_support_sparse,
365 .gmmu_map = gk20a_locked_gmmu_map,
366 .gmmu_unmap = gk20a_locked_gmmu_unmap,
367 .vm_bind_channel = gk20a_vm_bind_channel,
368 .fb_flush = gk20a_mm_fb_flush,
369 .l2_invalidate = gk20a_mm_l2_invalidate,
370 .l2_flush = gk20a_mm_l2_flush,
371 .cbc_clean = gk20a_mm_cbc_clean,
372 .set_big_page_size = gm20b_mm_set_big_page_size,
373 .get_big_page_sizes = gm20b_mm_get_big_page_sizes,
374 .get_default_big_page_size = gp10b_mm_get_default_big_page_size,
375 .gpu_phys_addr = gm20b_gpu_phys_addr,
376 .get_physical_addr_bits = NULL,
377 .get_mmu_levels = gp10b_mm_get_mmu_levels,
378 .init_pdb = gp10b_mm_init_pdb,
379 .init_mm_setup_hw = gp10b_init_mm_setup_hw,
380 .is_bar1_supported = gm20b_mm_is_bar1_supported,
381 .init_inst_block = gk20a_init_inst_block,
382 .mmu_fault_pending = gk20a_fifo_mmu_fault_pending,
383 .init_bar2_vm = gb10b_init_bar2_vm,
384 .init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup,
385 .remove_bar2_vm = gp10b_remove_bar2_vm,
386 .get_vidmem_size = gp106_mm_get_vidmem_size,
387 },
388 .pramin = { 359 .pramin = {
389 .enter = gk20a_pramin_enter, 360 .enter = gk20a_pramin_enter,
390 .exit = gk20a_pramin_exit, 361 .exit = gk20a_pramin_exit,
@@ -531,7 +502,6 @@ int gp106_init_hal(struct gk20a *g)
531 gops->fifo = gp106_ops.fifo; 502 gops->fifo = gp106_ops.fifo;
532 gops->gr_ctx = gp106_ops.gr_ctx; 503 gops->gr_ctx = gp106_ops.gr_ctx;
533 gops->fecs_trace = gp106_ops.fecs_trace; 504 gops->fecs_trace = gp106_ops.fecs_trace;
534 gops->mm = gp106_ops.mm;
535 gops->pramin = gp106_ops.pramin; 505 gops->pramin = gp106_ops.pramin;
536 gops->therm = gp106_ops.therm; 506 gops->therm = gp106_ops.therm;
537 /* 507 /*
@@ -573,6 +543,7 @@ int gp106_init_hal(struct gk20a *g)
573 543
574 g->bootstrap_owner = LSF_FALCON_ID_SEC2; 544 g->bootstrap_owner = LSF_FALCON_ID_SEC2;
575 gp106_init_gr(g); 545 gp106_init_gr(g);
546 gp106_init_mm(gops);
576 gp106_init_pmu_ops(g); 547 gp106_init_pmu_ops(g);
577 548
578 gp10b_init_uncompressed_kind_map(); 549 gp10b_init_uncompressed_kind_map();
diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.c b/drivers/gpu/nvgpu/gp106/mm_gp106.c
index 82c58e97..b7d7e8b8 100644
--- a/drivers/gpu/nvgpu/gp106/mm_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/mm_gp106.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP106 memory management 2 * GP106 memory management
3 * 3 *
4 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -19,7 +19,7 @@
19 19
20#include <nvgpu/hw/gp106/hw_fb_gp106.h> 20#include <nvgpu/hw/gp106/hw_fb_gp106.h>
21 21
22size_t gp106_mm_get_vidmem_size(struct gk20a *g) 22static size_t gp106_mm_get_vidmem_size(struct gk20a *g)
23{ 23{
24 u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r()); 24 u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r());
25 u32 mag = fb_mmu_local_memory_range_lower_mag_v(range); 25 u32 mag = fb_mmu_local_memory_range_lower_mag_v(range);
@@ -32,3 +32,10 @@ size_t gp106_mm_get_vidmem_size(struct gk20a *g)
32 32
33 return bytes; 33 return bytes;
34} 34}
35
36void gp106_init_mm(struct gpu_ops *gops)
37{
38 gp10b_init_mm(gops);
39 gops->mm.get_vidmem_size = gp106_mm_get_vidmem_size;
40 gops->mm.get_physical_addr_bits = NULL;
41}
diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.h b/drivers/gpu/nvgpu/gp106/mm_gp106.h
index 73b128a6..36a89a11 100644
--- a/drivers/gpu/nvgpu/gp106/mm_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/mm_gp106.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP106 memory management 2 * GP106 memory management
3 * 3 *
4 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -16,8 +16,8 @@
16#ifndef MM_GP106_H 16#ifndef MM_GP106_H
17#define MM_GP106_H 17#define MM_GP106_H
18 18
19struct gk20a; 19struct gpu_ops;
20 20
21size_t gp106_mm_get_vidmem_size(struct gk20a *g); 21void gp106_init_mm(struct gpu_ops *gops);
22 22
23#endif 23#endif