gpu: nvgpu: Rename gk20a_mem_* functions

Rename the functions used for mem_desc access to nvgpu_mem_*.

JIRA NVGPU-12

Change-Id: Ibfdc1112d43f0a125e4487c250e3f977ffd2cd75
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1323325
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 8 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c
index c7638d3e..ee709ed1 100644
--- a/drivers/gpu/nvgpu/gp106/acr_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c
@@ -701,7 +701,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g,
          */
         while (pnode) {
                 /* Flush WPR header to memory*/
-                gk20a_mem_wr_n(g, ucode, i * sizeof(pnode->wpr_header),
+                nvgpu_mem_wr_n(g, ucode, i * sizeof(pnode->wpr_header),
                                 &pnode->wpr_header, sizeof(pnode->wpr_header));
 
                 gp106_dbg_pmu("wpr header");
@@ -717,7 +717,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g,
                                 pnode->wpr_header.status);
 
                 /*Flush LSB header to memory*/
-                gk20a_mem_wr_n(g, ucode, pnode->wpr_header.lsb_offset,
+                nvgpu_mem_wr_n(g, ucode, pnode->wpr_header.lsb_offset,
                                 &pnode->lsb_header, sizeof(pnode->lsb_header));
 
                 gp106_dbg_pmu("lsb header");
@@ -751,13 +751,13 @@ static void lsfm_init_wpr_contents(struct gk20a *g,
                 if (!pnode->ucode_img.header) {
                         /*Populate gen bl and flush to memory*/
                         lsfm_fill_flcn_bl_gen_desc(g, pnode);
-                        gk20a_mem_wr_n(g, ucode,
+                        nvgpu_mem_wr_n(g, ucode,
                                         pnode->lsb_header.bl_data_off,
                                         &pnode->bl_gen_desc,
                                         pnode->bl_gen_desc_size);
                 }
                 /*Copying of ucode*/
-                gk20a_mem_wr_n(g, ucode, pnode->lsb_header.ucode_off,
+                nvgpu_mem_wr_n(g, ucode, pnode->lsb_header.ucode_off,
                                 pnode->ucode_img.data,
                                 pnode->ucode_img.data_size);
                 pnode = pnode->next;
@@ -765,7 +765,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g,
         }
 
         /* Tag the terminator WPR header with an invalid falcon ID. */
-        gk20a_mem_wr32(g, ucode,
+        nvgpu_mem_wr32(g, ucode,
                         plsfm->managed_flcn_cnt * sizeof(struct lsf_wpr_header) +
                         offsetof(struct lsf_wpr_header, falcon_id),
                         LSF_FALCON_ID_INVALID);
@@ -1124,7 +1124,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g)
                 ((struct flcn_acr_desc_v1 *)acr_dmem)->regions.region_props[
                         0].shadowmMem_startaddress = wpr_inf.nonwpr_base >> 8;
 
-                gk20a_mem_wr_n(g, &acr->acr_ucode, 0,
+                nvgpu_mem_wr_n(g, &acr->acr_ucode, 0,
                                 acr_ucode_data_t210_load, img_size_in_bytes);
 
                 /*
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
index dd67f882..5a331480 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
@@ -170,7 +170,7 @@ int bl_bootstrap_sec2(struct pmu_gk20a *pmu,
                         pwr_pmu_new_instblk_ptr_f(
                         gk20a_mm_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
                         pwr_pmu_new_instblk_valid_f(1) |
-                        gk20a_aperture_mask(g, &mm->pmu.inst_block,
+                        nvgpu_aperture_mask(g, &mm->pmu.inst_block,
                                 pwr_pmu_new_instblk_target_sys_coh_f(),
                                 pwr_pmu_new_instblk_target_fb_f()));
 
@@ -315,7 +315,7 @@ void init_pmu_setup_hw1(struct gk20a *g)
                                 pwr_pmu_new_instblk_ptr_f(
                                         gk20a_mm_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
                                 pwr_pmu_new_instblk_valid_f(1) |
-                                gk20a_aperture_mask(g, &mm->pmu.inst_block,
+                                nvgpu_aperture_mask(g, &mm->pmu.inst_block,
                                         pwr_pmu_new_instblk_target_sys_coh_f(),
                                         pwr_pmu_new_instblk_target_fb_f()));