diff options
author | Sunny He <suhe@nvidia.com> | 2017-07-28 21:36:52 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-02 17:43:25 -0400 |
commit | a15e110a9b790f55a5c6e257cfbf7f7235f5a334 (patch) | |
tree | 199209146e3e67927c13e2ece240de40f973e1ea /drivers/gpu/nvgpu/gp106 | |
parent | 43ae97000be786e4118d431637f05b1462e296c4 (diff) |
gpu: nvgpu: Reorg regops HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
regops sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I7e2ccf158a8e7efa453a3326e86146660f18926f
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1530135
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 25 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/regops_gp106.c | 65 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/regops_gp106.h | 16 |
3 files changed, 52 insertions, 54 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 8077c5e1..0caf890f 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -353,6 +353,29 @@ static const struct gpu_ops gp106_ops = { | |||
353 | .get_internal_sensor_limits = gp106_get_internal_sensor_limits, | 353 | .get_internal_sensor_limits = gp106_get_internal_sensor_limits, |
354 | .configure_therm_alert = gp106_configure_therm_alert, | 354 | .configure_therm_alert = gp106_configure_therm_alert, |
355 | }, | 355 | }, |
356 | .regops = { | ||
357 | .get_global_whitelist_ranges = | ||
358 | gp106_get_global_whitelist_ranges, | ||
359 | .get_global_whitelist_ranges_count = | ||
360 | gp106_get_global_whitelist_ranges_count, | ||
361 | .get_context_whitelist_ranges = | ||
362 | gp106_get_context_whitelist_ranges, | ||
363 | .get_context_whitelist_ranges_count = | ||
364 | gp106_get_context_whitelist_ranges_count, | ||
365 | .get_runcontrol_whitelist = gp106_get_runcontrol_whitelist, | ||
366 | .get_runcontrol_whitelist_count = | ||
367 | gp106_get_runcontrol_whitelist_count, | ||
368 | .get_runcontrol_whitelist_ranges = | ||
369 | gp106_get_runcontrol_whitelist_ranges, | ||
370 | .get_runcontrol_whitelist_ranges_count = | ||
371 | gp106_get_runcontrol_whitelist_ranges_count, | ||
372 | .get_qctl_whitelist = gp106_get_qctl_whitelist, | ||
373 | .get_qctl_whitelist_count = gp106_get_qctl_whitelist_count, | ||
374 | .get_qctl_whitelist_ranges = gp106_get_qctl_whitelist_ranges, | ||
375 | .get_qctl_whitelist_ranges_count = | ||
376 | gp106_get_qctl_whitelist_ranges_count, | ||
377 | .apply_smpc_war = gp106_apply_smpc_war, | ||
378 | }, | ||
356 | .mc = { | 379 | .mc = { |
357 | .intr_enable = mc_gp10b_intr_enable, | 380 | .intr_enable = mc_gp10b_intr_enable, |
358 | .intr_unit_config = mc_gp10b_intr_unit_config, | 381 | .intr_unit_config = mc_gp10b_intr_unit_config, |
@@ -447,6 +470,7 @@ int gp106_init_hal(struct gk20a *g) | |||
447 | gops->fecs_trace = gp106_ops.fecs_trace; | 470 | gops->fecs_trace = gp106_ops.fecs_trace; |
448 | gops->pramin = gp106_ops.pramin; | 471 | gops->pramin = gp106_ops.pramin; |
449 | gops->therm = gp106_ops.therm; | 472 | gops->therm = gp106_ops.therm; |
473 | gops->regops = gp106_ops.regops; | ||
450 | gops->mc = gp106_ops.mc; | 474 | gops->mc = gp106_ops.mc; |
451 | gops->debug = gp106_ops.debug; | 475 | gops->debug = gp106_ops.debug; |
452 | gops->dbg_session_ops = gp106_ops.dbg_session_ops; | 476 | gops->dbg_session_ops = gp106_ops.dbg_session_ops; |
@@ -477,7 +501,6 @@ int gp106_init_hal(struct gk20a *g) | |||
477 | gp106_init_pmu_ops(g); | 501 | gp106_init_pmu_ops(g); |
478 | gp106_init_clk_ops(gops); | 502 | gp106_init_clk_ops(gops); |
479 | gp106_init_clk_arb_ops(gops); | 503 | gp106_init_clk_arb_ops(gops); |
480 | gp106_init_regops(gops); | ||
481 | 504 | ||
482 | g->name = "gp10x"; | 505 | g->name = "gp10x"; |
483 | 506 | ||
diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.c b/drivers/gpu/nvgpu/gp106/regops_gp106.c index a165c426..f734ef49 100644 --- a/drivers/gpu/nvgpu/gp106/regops_gp106.c +++ b/drivers/gpu/nvgpu/gp106/regops_gp106.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Tegra GP106 GPU Debugger Driver Register Ops | 2 | * Tegra GP106 GPU Debugger Driver Register Ops |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -1708,105 +1708,68 @@ static const struct regop_offset_range gp106_qctl_whitelist_ranges[] = { | |||
1708 | static const u32 gp106_qctl_whitelist_ranges_count = | 1708 | static const u32 gp106_qctl_whitelist_ranges_count = |
1709 | ARRAY_SIZE(gp106_qctl_whitelist_ranges); | 1709 | ARRAY_SIZE(gp106_qctl_whitelist_ranges); |
1710 | 1710 | ||
1711 | static const struct regop_offset_range *gp106_get_global_whitelist_ranges(void) | 1711 | const struct regop_offset_range *gp106_get_global_whitelist_ranges(void) |
1712 | { | 1712 | { |
1713 | return gp106_global_whitelist_ranges; | 1713 | return gp106_global_whitelist_ranges; |
1714 | } | 1714 | } |
1715 | 1715 | ||
1716 | static int gp106_get_global_whitelist_ranges_count(void) | 1716 | int gp106_get_global_whitelist_ranges_count(void) |
1717 | { | 1717 | { |
1718 | return gp106_global_whitelist_ranges_count; | 1718 | return gp106_global_whitelist_ranges_count; |
1719 | } | 1719 | } |
1720 | 1720 | ||
1721 | static const struct regop_offset_range *gp106_get_context_whitelist_ranges(void) | 1721 | const struct regop_offset_range *gp106_get_context_whitelist_ranges(void) |
1722 | { | 1722 | { |
1723 | return gp106_global_whitelist_ranges; | 1723 | return gp106_global_whitelist_ranges; |
1724 | } | 1724 | } |
1725 | 1725 | ||
1726 | static int gp106_get_context_whitelist_ranges_count(void) | 1726 | int gp106_get_context_whitelist_ranges_count(void) |
1727 | { | 1727 | { |
1728 | return gp106_global_whitelist_ranges_count; | 1728 | return gp106_global_whitelist_ranges_count; |
1729 | } | 1729 | } |
1730 | 1730 | ||
1731 | static const u32 *gp106_get_runcontrol_whitelist(void) | 1731 | const u32 *gp106_get_runcontrol_whitelist(void) |
1732 | { | 1732 | { |
1733 | return gp106_runcontrol_whitelist; | 1733 | return gp106_runcontrol_whitelist; |
1734 | } | 1734 | } |
1735 | 1735 | ||
1736 | static int gp106_get_runcontrol_whitelist_count(void) | 1736 | int gp106_get_runcontrol_whitelist_count(void) |
1737 | { | 1737 | { |
1738 | return gp106_runcontrol_whitelist_count; | 1738 | return gp106_runcontrol_whitelist_count; |
1739 | } | 1739 | } |
1740 | 1740 | ||
1741 | static const | 1741 | const struct regop_offset_range *gp106_get_runcontrol_whitelist_ranges(void) |
1742 | struct regop_offset_range *gp106_get_runcontrol_whitelist_ranges(void) | ||
1743 | { | 1742 | { |
1744 | return gp106_runcontrol_whitelist_ranges; | 1743 | return gp106_runcontrol_whitelist_ranges; |
1745 | } | 1744 | } |
1746 | 1745 | ||
1747 | static int gp106_get_runcontrol_whitelist_ranges_count(void) | 1746 | int gp106_get_runcontrol_whitelist_ranges_count(void) |
1748 | { | 1747 | { |
1749 | return gp106_runcontrol_whitelist_ranges_count; | 1748 | return gp106_runcontrol_whitelist_ranges_count; |
1750 | } | 1749 | } |
1751 | 1750 | ||
1752 | static const u32 *gp106_get_qctl_whitelist(void) | 1751 | const u32 *gp106_get_qctl_whitelist(void) |
1753 | { | 1752 | { |
1754 | return gp106_qctl_whitelist; | 1753 | return gp106_qctl_whitelist; |
1755 | } | 1754 | } |
1756 | 1755 | ||
1757 | static int gp106_get_qctl_whitelist_count(void) | 1756 | int gp106_get_qctl_whitelist_count(void) |
1758 | { | 1757 | { |
1759 | return gp106_qctl_whitelist_count; | 1758 | return gp106_qctl_whitelist_count; |
1760 | } | 1759 | } |
1761 | 1760 | ||
1762 | static const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void) | 1761 | const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void) |
1763 | { | 1762 | { |
1764 | return gp106_qctl_whitelist_ranges; | 1763 | return gp106_qctl_whitelist_ranges; |
1765 | } | 1764 | } |
1766 | 1765 | ||
1767 | static int gp106_get_qctl_whitelist_ranges_count(void) | 1766 | int gp106_get_qctl_whitelist_ranges_count(void) |
1768 | { | 1767 | { |
1769 | return gp106_qctl_whitelist_ranges_count; | 1768 | return gp106_qctl_whitelist_ranges_count; |
1770 | } | 1769 | } |
1771 | 1770 | ||
1772 | static int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s) | 1771 | int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s) |
1773 | { | 1772 | { |
1774 | /* Not needed on gp106 */ | 1773 | /* Not needed on gp106 */ |
1775 | return 0; | 1774 | return 0; |
1776 | } | 1775 | } |
1777 | |||
1778 | void gp106_init_regops(struct gpu_ops *gops) | ||
1779 | { | ||
1780 | gops->regops.get_global_whitelist_ranges = | ||
1781 | gp106_get_global_whitelist_ranges; | ||
1782 | gops->regops.get_global_whitelist_ranges_count = | ||
1783 | gp106_get_global_whitelist_ranges_count; | ||
1784 | |||
1785 | gops->regops.get_context_whitelist_ranges = | ||
1786 | gp106_get_context_whitelist_ranges; | ||
1787 | gops->regops.get_context_whitelist_ranges_count = | ||
1788 | gp106_get_context_whitelist_ranges_count; | ||
1789 | |||
1790 | gops->regops.get_runcontrol_whitelist = | ||
1791 | gp106_get_runcontrol_whitelist; | ||
1792 | gops->regops.get_runcontrol_whitelist_count = | ||
1793 | gp106_get_runcontrol_whitelist_count; | ||
1794 | |||
1795 | gops->regops.get_runcontrol_whitelist_ranges = | ||
1796 | gp106_get_runcontrol_whitelist_ranges; | ||
1797 | gops->regops.get_runcontrol_whitelist_ranges_count = | ||
1798 | gp106_get_runcontrol_whitelist_ranges_count; | ||
1799 | |||
1800 | gops->regops.get_qctl_whitelist = | ||
1801 | gp106_get_qctl_whitelist; | ||
1802 | gops->regops.get_qctl_whitelist_count = | ||
1803 | gp106_get_qctl_whitelist_count; | ||
1804 | |||
1805 | gops->regops.get_qctl_whitelist_ranges = | ||
1806 | gp106_get_qctl_whitelist_ranges; | ||
1807 | gops->regops.get_qctl_whitelist_ranges_count = | ||
1808 | gp106_get_qctl_whitelist_ranges_count; | ||
1809 | |||
1810 | gops->regops.apply_smpc_war = | ||
1811 | gp106_apply_smpc_war; | ||
1812 | } | ||
diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.h b/drivers/gpu/nvgpu/gp106/regops_gp106.h index 7f6b6861..271adcbf 100644 --- a/drivers/gpu/nvgpu/gp106/regops_gp106.h +++ b/drivers/gpu/nvgpu/gp106/regops_gp106.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Tegra GP106 GPU Debugger Driver Register Ops | 3 | * Tegra GP106 GPU Debugger Driver Register Ops |
4 | * | 4 | * |
5 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 5 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
8 | * under the terms and conditions of the GNU General Public License, | 8 | * under the terms and conditions of the GNU General Public License, |
@@ -19,6 +19,18 @@ | |||
19 | #ifndef __REGOPS_GP106_H_ | 19 | #ifndef __REGOPS_GP106_H_ |
20 | #define __REGOPS_GP106_H_ | 20 | #define __REGOPS_GP106_H_ |
21 | 21 | ||
22 | void gp106_init_regops(struct gpu_ops *gops); | 22 | const struct regop_offset_range *gp106_get_global_whitelist_ranges(void); |
23 | int gp106_get_global_whitelist_ranges_count(void); | ||
24 | const struct regop_offset_range *gp106_get_context_whitelist_ranges(void); | ||
25 | int gp106_get_context_whitelist_ranges_count(void); | ||
26 | const u32 *gp106_get_runcontrol_whitelist(void); | ||
27 | int gp106_get_runcontrol_whitelist_count(void); | ||
28 | const struct regop_offset_range *gp106_get_runcontrol_whitelist_ranges(void); | ||
29 | int gp106_get_runcontrol_whitelist_ranges_count(void); | ||
30 | const u32 *gp106_get_qctl_whitelist(void); | ||
31 | int gp106_get_qctl_whitelist_count(void); | ||
32 | const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void); | ||
33 | int gp106_get_qctl_whitelist_ranges_count(void); | ||
34 | int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s); | ||
23 | 35 | ||
24 | #endif /* __REGOPS_GP106_H_ */ | 36 | #endif /* __REGOPS_GP106_H_ */ |