diff options
author | Sunny He <suhe@nvidia.com> | 2017-07-31 21:54:38 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-14 18:55:19 -0400 |
commit | 959c02d6757c3c40748f7d2db1515885a5066a12 (patch) | |
tree | 58b685a52bc8b543565645227219c1c9609a50b3 /drivers/gpu/nvgpu/gp106 | |
parent | ee60394abc9a52182892ab54554d3e9c841080bf (diff) |
gpu: nvgpu: Reorg mm HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
mm sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: Ieb87a62f047510e51c52e6563d8e3fd5a65b5f28
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537753
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 29 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/mm_gp106.c | 11 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/mm_gp106.h | 6 |
3 files changed, 33 insertions, 13 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 361a7b0f..6a50be34 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include "gk20a/fifo_gk20a.h" | 17 | #include "gk20a/fifo_gk20a.h" |
18 | #include "gk20a/ctxsw_trace_gk20a.h" | 18 | #include "gk20a/ctxsw_trace_gk20a.h" |
19 | #include "gk20a/fecs_trace_gk20a.h" | 19 | #include "gk20a/fecs_trace_gk20a.h" |
20 | #include "gk20a/mm_gk20a.h" | ||
20 | #include "gk20a/dbg_gpu_gk20a.h" | 21 | #include "gk20a/dbg_gpu_gk20a.h" |
21 | #include "gk20a/css_gr_gk20a.h" | 22 | #include "gk20a/css_gr_gk20a.h" |
22 | #include "gk20a/bus_gk20a.h" | 23 | #include "gk20a/bus_gk20a.h" |
@@ -44,6 +45,7 @@ | |||
44 | #include "gm20b/ltc_gm20b.h" | 45 | #include "gm20b/ltc_gm20b.h" |
45 | #include "gm20b/gr_gm20b.h" | 46 | #include "gm20b/gr_gm20b.h" |
46 | #include "gm20b/fifo_gm20b.h" | 47 | #include "gm20b/fifo_gm20b.h" |
48 | #include "gm20b/mm_gm20b.h" | ||
47 | #include "gm20b/pmu_gm20b.h" | 49 | #include "gm20b/pmu_gm20b.h" |
48 | #include "gm20b/fb_gm20b.h" | 50 | #include "gm20b/fb_gm20b.h" |
49 | 51 | ||
@@ -356,6 +358,31 @@ static const struct gpu_ops gp106_ops = { | |||
356 | .max_entries = gk20a_gr_max_entries, | 358 | .max_entries = gk20a_gr_max_entries, |
357 | }, | 359 | }, |
358 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ | 360 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ |
361 | .mm = { | ||
362 | .support_sparse = gm20b_mm_support_sparse, | ||
363 | .gmmu_map = gk20a_locked_gmmu_map, | ||
364 | .gmmu_unmap = gk20a_locked_gmmu_unmap, | ||
365 | .vm_bind_channel = gk20a_vm_bind_channel, | ||
366 | .fb_flush = gk20a_mm_fb_flush, | ||
367 | .l2_invalidate = gk20a_mm_l2_invalidate, | ||
368 | .l2_flush = gk20a_mm_l2_flush, | ||
369 | .cbc_clean = gk20a_mm_cbc_clean, | ||
370 | .set_big_page_size = gm20b_mm_set_big_page_size, | ||
371 | .get_big_page_sizes = gm20b_mm_get_big_page_sizes, | ||
372 | .get_default_big_page_size = gp10b_mm_get_default_big_page_size, | ||
373 | .gpu_phys_addr = gm20b_gpu_phys_addr, | ||
374 | .get_physical_addr_bits = NULL, | ||
375 | .get_mmu_levels = gp10b_mm_get_mmu_levels, | ||
376 | .init_pdb = gp10b_mm_init_pdb, | ||
377 | .init_mm_setup_hw = gp10b_init_mm_setup_hw, | ||
378 | .is_bar1_supported = gm20b_mm_is_bar1_supported, | ||
379 | .init_inst_block = gk20a_init_inst_block, | ||
380 | .mmu_fault_pending = gk20a_fifo_mmu_fault_pending, | ||
381 | .init_bar2_vm = gb10b_init_bar2_vm, | ||
382 | .init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup, | ||
383 | .remove_bar2_vm = gp10b_remove_bar2_vm, | ||
384 | .get_vidmem_size = gp106_mm_get_vidmem_size, | ||
385 | }, | ||
359 | .pramin = { | 386 | .pramin = { |
360 | .enter = gk20a_pramin_enter, | 387 | .enter = gk20a_pramin_enter, |
361 | .exit = gk20a_pramin_exit, | 388 | .exit = gk20a_pramin_exit, |
@@ -502,6 +529,7 @@ int gp106_init_hal(struct gk20a *g) | |||
502 | gops->fifo = gp106_ops.fifo; | 529 | gops->fifo = gp106_ops.fifo; |
503 | gops->gr_ctx = gp106_ops.gr_ctx; | 530 | gops->gr_ctx = gp106_ops.gr_ctx; |
504 | gops->fecs_trace = gp106_ops.fecs_trace; | 531 | gops->fecs_trace = gp106_ops.fecs_trace; |
532 | gops->mm = gp106_ops.mm; | ||
505 | gops->pramin = gp106_ops.pramin; | 533 | gops->pramin = gp106_ops.pramin; |
506 | gops->therm = gp106_ops.therm; | 534 | gops->therm = gp106_ops.therm; |
507 | /* | 535 | /* |
@@ -543,7 +571,6 @@ int gp106_init_hal(struct gk20a *g) | |||
543 | 571 | ||
544 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; | 572 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; |
545 | gp106_init_gr(g); | 573 | gp106_init_gr(g); |
546 | gp106_init_mm(gops); | ||
547 | gp106_init_pmu_ops(g); | 574 | gp106_init_pmu_ops(g); |
548 | 575 | ||
549 | gp10b_init_uncompressed_kind_map(); | 576 | gp10b_init_uncompressed_kind_map(); |
diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.c b/drivers/gpu/nvgpu/gp106/mm_gp106.c index b7d7e8b8..82c58e97 100644 --- a/drivers/gpu/nvgpu/gp106/mm_gp106.c +++ b/drivers/gpu/nvgpu/gp106/mm_gp106.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP106 memory management | 2 | * GP106 memory management |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -19,7 +19,7 @@ | |||
19 | 19 | ||
20 | #include <nvgpu/hw/gp106/hw_fb_gp106.h> | 20 | #include <nvgpu/hw/gp106/hw_fb_gp106.h> |
21 | 21 | ||
22 | static size_t gp106_mm_get_vidmem_size(struct gk20a *g) | 22 | size_t gp106_mm_get_vidmem_size(struct gk20a *g) |
23 | { | 23 | { |
24 | u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r()); | 24 | u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r()); |
25 | u32 mag = fb_mmu_local_memory_range_lower_mag_v(range); | 25 | u32 mag = fb_mmu_local_memory_range_lower_mag_v(range); |
@@ -32,10 +32,3 @@ static size_t gp106_mm_get_vidmem_size(struct gk20a *g) | |||
32 | 32 | ||
33 | return bytes; | 33 | return bytes; |
34 | } | 34 | } |
35 | |||
36 | void gp106_init_mm(struct gpu_ops *gops) | ||
37 | { | ||
38 | gp10b_init_mm(gops); | ||
39 | gops->mm.get_vidmem_size = gp106_mm_get_vidmem_size; | ||
40 | gops->mm.get_physical_addr_bits = NULL; | ||
41 | } | ||
diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.h b/drivers/gpu/nvgpu/gp106/mm_gp106.h index 36a89a11..73b128a6 100644 --- a/drivers/gpu/nvgpu/gp106/mm_gp106.h +++ b/drivers/gpu/nvgpu/gp106/mm_gp106.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP106 memory management | 2 | * GP106 memory management |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -16,8 +16,8 @@ | |||
16 | #ifndef MM_GP106_H | 16 | #ifndef MM_GP106_H |
17 | #define MM_GP106_H | 17 | #define MM_GP106_H |
18 | 18 | ||
19 | struct gpu_ops; | 19 | struct gk20a; |
20 | 20 | ||
21 | void gp106_init_mm(struct gpu_ops *gops); | 21 | size_t gp106_mm_get_vidmem_size(struct gk20a *g); |
22 | 22 | ||
23 | #endif | 23 | #endif |