gpu: nvgpu: Reorg mm HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
mm sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I289284e6e528fc7951c959c8765ccf9349eec33b
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1533351
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 35 insertions, 13 deletions

diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 361a7b0f..c919143c 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -17,6 +17,7 @@
 #include "gk20a/fifo_gk20a.h"
 #include "gk20a/ctxsw_trace_gk20a.h"
 #include "gk20a/fecs_trace_gk20a.h"
+#include "gk20a/mm_gk20a.h"
 #include "gk20a/dbg_gpu_gk20a.h"
 #include "gk20a/css_gr_gk20a.h"
 #include "gk20a/bus_gk20a.h"
@@ -44,6 +45,7 @@
 #include "gm20b/ltc_gm20b.h"
 #include "gm20b/gr_gm20b.h"
 #include "gm20b/fifo_gm20b.h"
+#include "gm20b/mm_gm20b.h"
 #include "gm20b/pmu_gm20b.h"
 #include "gm20b/fb_gm20b.h"
 
@@ -65,6 +67,8 @@
 
 #include "hal_gp106.h"
 
+#include "common/linux/platform_gk20a_tegra.h"
+
 #include <nvgpu/debug.h>
 #include <nvgpu/bug.h>
 #include <nvgpu/bus.h>
@@ -356,6 +360,31 @@ static const struct gpu_ops gp106_ops = {
                 .max_entries = gk20a_gr_max_entries,
         },
 #endif /* CONFIG_GK20A_CTXSW_TRACE */
+        .mm = {
+                .support_sparse = gm20b_mm_support_sparse,
+                .gmmu_map = gk20a_locked_gmmu_map,
+                .gmmu_unmap = gk20a_locked_gmmu_unmap,
+                .vm_bind_channel = gk20a_vm_bind_channel,
+                .fb_flush = gk20a_mm_fb_flush,
+                .l2_invalidate = gk20a_mm_l2_invalidate,
+                .l2_flush = gk20a_mm_l2_flush,
+                .cbc_clean = gk20a_mm_cbc_clean,
+                .set_big_page_size = gm20b_mm_set_big_page_size,
+                .get_big_page_sizes = gm20b_mm_get_big_page_sizes,
+                .get_default_big_page_size = gp10b_mm_get_default_big_page_size,
+                .gpu_phys_addr = gm20b_gpu_phys_addr,
+                .get_physical_addr_bits = NULL,
+                .get_mmu_levels = gp10b_mm_get_mmu_levels,
+                .init_pdb = gp10b_mm_init_pdb,
+                .init_mm_setup_hw = gp10b_init_mm_setup_hw,
+                .is_bar1_supported = gm20b_mm_is_bar1_supported,
+                .init_inst_block = gk20a_init_inst_block,
+                .mmu_fault_pending = gk20a_fifo_mmu_fault_pending,
+                .init_bar2_vm = gb10b_init_bar2_vm,
+                .init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup,
+                .remove_bar2_vm = gp10b_remove_bar2_vm,
+                .get_vidmem_size = gp106_mm_get_vidmem_size,
+        },
         .pramin = {
                 .enter = gk20a_pramin_enter,
                 .exit = gk20a_pramin_exit,
@@ -502,6 +531,7 @@ int gp106_init_hal(struct gk20a *g)
         gops->fifo = gp106_ops.fifo;
         gops->gr_ctx = gp106_ops.gr_ctx;
         gops->fecs_trace = gp106_ops.fecs_trace;
+        gops->mm = gp106_ops.mm;
         gops->pramin = gp106_ops.pramin;
         gops->therm = gp106_ops.therm;
         /*
@@ -543,7 +573,6 @@ int gp106_init_hal(struct gk20a *g)
 
         g->bootstrap_owner = LSF_FALCON_ID_SEC2;
         gp106_init_gr(g);
-        gp106_init_mm(gops);
         gp106_init_pmu_ops(g);
 
         gp10b_init_uncompressed_kind_map();
diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.c b/drivers/gpu/nvgpu/gp106/mm_gp106.c
index b7d7e8b8..82c58e97 100644
--- a/drivers/gpu/nvgpu/gp106/mm_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/mm_gp106.c
@@ -1,7 +1,7 @@
 /*
  * GP106 memory management
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -19,7 +19,7 @@
 
 #include <nvgpu/hw/gp106/hw_fb_gp106.h>
 
-static size_t gp106_mm_get_vidmem_size(struct gk20a *g)
+size_t gp106_mm_get_vidmem_size(struct gk20a *g)
 {
         u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r());
         u32 mag = fb_mmu_local_memory_range_lower_mag_v(range);
@@ -32,10 +32,3 @@ static size_t gp106_mm_get_vidmem_size(struct gk20a *g)
 
         return bytes;
 }
-
-void gp106_init_mm(struct gpu_ops *gops)
-{
-        gp10b_init_mm(gops);
-        gops->mm.get_vidmem_size = gp106_mm_get_vidmem_size;
-        gops->mm.get_physical_addr_bits = NULL;
-}
diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.h b/drivers/gpu/nvgpu/gp106/mm_gp106.h
index 36a89a11..73b128a6 100644
--- a/drivers/gpu/nvgpu/gp106/mm_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/mm_gp106.h
@@ -1,7 +1,7 @@
 /*
  * GP106 memory management
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -16,8 +16,8 @@
 #ifndef MM_GP106_H
 #define MM_GP106_H
 
-struct gpu_ops;
+struct gk20a;
 
-void gp106_init_mm(struct gpu_ops *gops);
+size_t gp106_mm_get_vidmem_size(struct gk20a *g);
 
 #endif