diff options
author | Vijayakumar Subbu <vsubbu@nvidia.com> | 2016-07-30 13:44:30 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:49 -0500 |
commit | 432017248e432df0619dc2df30f915a52634338f (patch) | |
tree | 40bb7a77983fb2753271bc46b346a44ebd6121cf /drivers/gpu/nvgpu/gp106 | |
parent | 38ad90b4840434df4650c617a236e1b01f8a43c6 (diff) |
gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-42
Change-Id: Ic2fca9d0cf82f2823654ac5e8f0772a1eec7b3b5
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1205850
(cherry picked from commit b9f5c6bc4e649162d63e33d65b725872340ca114)
Reviewed-on: http://git-master/r/1227257
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hw_fuse_gp106.h | 88 |
2 files changed, 89 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index a52fab7b..822591ed 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -144,7 +144,7 @@ int gp106_init_hal(struct gk20a *g) | |||
144 | 144 | ||
145 | gops->privsecurity = 1; | 145 | gops->privsecurity = 1; |
146 | gops->securegpccs = 1; | 146 | gops->securegpccs = 1; |
147 | 147 | gops->pmupstate = true; | |
148 | gp10b_init_mc(gops); | 148 | gp10b_init_mc(gops); |
149 | gp106_init_gr(gops); | 149 | gp106_init_gr(gops); |
150 | gp106_init_ltc(gops); | 150 | gp106_init_ltc(gops); |
diff --git a/drivers/gpu/nvgpu/gp106/hw_fuse_gp106.h b/drivers/gpu/nvgpu/gp106/hw_fuse_gp106.h index 0d4c0362..afabc943 100644 --- a/drivers/gpu/nvgpu/gp106/hw_fuse_gp106.h +++ b/drivers/gpu/nvgpu/gp106/hw_fuse_gp106.h | |||
@@ -126,4 +126,92 @@ static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i) | |||
126 | { | 126 | { |
127 | return (r >> (0 + i*0)) & 0x1; | 127 | return (r >> (0 + i*0)) & 0x1; |
128 | } | 128 | } |
129 | static inline u32 fuse_vin_cal_fuse_rev_r(void) | ||
130 | { | ||
131 | return 0x0002164c; | ||
132 | } | ||
133 | static inline u32 fuse_vin_cal_fuse_rev_v(u32 r) | ||
134 | { | ||
135 | return 0x3 & r; | ||
136 | } | ||
137 | static inline u32 fuse_vin_cal_gpc0_r(void) | ||
138 | { | ||
139 | return 0x00021650; | ||
140 | } | ||
141 | static inline u32 fuse_vin_cal_gpc0_icpt_data_v(u32 r) | ||
142 | { | ||
143 | return ((r & 0xFFFC000) >> 14); | ||
144 | } | ||
145 | static inline u32 fuse_vin_cal_gpc0_icpt_frac_size_v(void) | ||
146 | { | ||
147 | return 2; | ||
148 | } | ||
149 | static inline u32 fuse_vin_cal_gpc0_slope_data_v(u32 r) | ||
150 | { | ||
151 | return (r & 0x3FFF); | ||
152 | } | ||
153 | static inline u32 fuse_vin_cal_gpc0_slope_frac_size_v(void) | ||
154 | { | ||
155 | return 10; | ||
156 | } | ||
157 | static inline u32 fuse_vin_cal_gpc1_delta_r(void) | ||
158 | { | ||
159 | return 0x00021654; | ||
160 | } | ||
161 | static inline u32 fuse_vin_cal_gpc1_icpt_sign_f(void) | ||
162 | { | ||
163 | return 0x400000; | ||
164 | } | ||
165 | static inline u32 fuse_vin_cal_gpc1_slope_sign_f(void) | ||
166 | { | ||
167 | return 0x8000; | ||
168 | } | ||
169 | static inline u32 fuse_vin_cal_gpc1_icpt_data_v(u32 r) | ||
170 | { | ||
171 | return ((r & 0x3FF000) >> 12); | ||
172 | } | ||
173 | static inline u32 fuse_vin_cal_gpc1_icpt_frac_size_v(void) | ||
174 | { | ||
175 | return 2; | ||
176 | } | ||
177 | static inline u32 fuse_vin_cal_gpc1_slope_data_v(u32 r) | ||
178 | { | ||
179 | return (r & 0x7FF); | ||
180 | } | ||
181 | static inline u32 fuse_vin_cal_gpc1_slope_frac_size_v(void) | ||
182 | { | ||
183 | return 10; | ||
184 | } | ||
185 | static inline u32 fuse_vin_cal_gpc2_delta_r(void) | ||
186 | { | ||
187 | return 0x00021658; | ||
188 | } | ||
189 | static inline u32 fuse_vin_cal_gpc3_delta_r(void) | ||
190 | { | ||
191 | return 0x0002165c; | ||
192 | } | ||
193 | static inline u32 fuse_vin_cal_gpc4_delta_r(void) | ||
194 | { | ||
195 | return 0x00021660; | ||
196 | } | ||
197 | static inline u32 fuse_vin_cal_gpc5_delta_r(void) | ||
198 | { | ||
199 | return 0x00021664; | ||
200 | } | ||
201 | static inline u32 fuse_vin_cal_shared_delta_r(void) | ||
202 | { | ||
203 | return 0x00021668; | ||
204 | } | ||
205 | static inline u32 fuse_vin_cal_sram_delta_r(void) | ||
206 | { | ||
207 | return 0x0002166c; | ||
208 | } | ||
209 | static inline u32 fuse_vin_cal_sram_icpt_data_v(u32 r) | ||
210 | { | ||
211 | return ((r & 0x3FF000) >> 12); | ||
212 | } | ||
213 | static inline u32 fuse_vin_cal_sram_icpt_frac_size_v(void) | ||
214 | { | ||
215 | return 1; | ||
216 | } | ||
129 | #endif | 217 | #endif |