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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-03-29 18:00:24 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-11 13:56:06 -0400
commit19fdb429c2b04d13faecad8b2e5466e9f3c7b8c7 (patch)
treee92f6d93ae2593286546f983b9a1fff8638aa9a6 /drivers/gpu/nvgpu/gp106
parent1a4647272f4fe50137c79583b698c1ef6f5def12 (diff)
gpu: nvgpu: Wrappers for checking platform type
Add nvgpu_* wrappers for determining if we're running in simulation or silicon, and if we're running in hypervisor. The new wrappers require struct gk20a pointer, and gk20a_fence_wait() did not have access to one. Add struct gk20a pointer as the first parameter. JIRA NVGPU-16 Change-Id: I73b2b8f091ca29fb1827054abd2adaf583710331 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1331565 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_gp106.c2
-rw-r--r--drivers/gpu/nvgpu/gp106/therm_gp106.c8
2 files changed, 2 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
index cadbd308..308bcf04 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -71,7 +71,7 @@ static int gp106_pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
71 return 0; 71 return 0;
72 } 72 }
73 udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT); 73 udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
74 } while (--retries || !tegra_platform_is_silicon()); 74 } while (--retries);
75 75
76 /* If scrubbing timeout, keep PMU in reset state */ 76 /* If scrubbing timeout, keep PMU in reset state */
77 gk20a_writel(g, pwr_falcon_engine_r(), 77 gk20a_writel(g, pwr_falcon_engine_r(),
diff --git a/drivers/gpu/nvgpu/gp106/therm_gp106.c b/drivers/gpu/nvgpu/gp106/therm_gp106.c
index bf8fbfe7..761d1b89 100644
--- a/drivers/gpu/nvgpu/gp106/therm_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/therm_gp106.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License, 5 * under the terms and conditions of the GNU General Public License,
@@ -87,12 +87,6 @@ static int gp106_elcg_init_idle_filters(struct gk20a *g)
87 active_engine_id = f->active_engines_list[engine_id]; 87 active_engine_id = f->active_engines_list[engine_id];
88 gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id)); 88 gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id));
89 89
90 if (tegra_platform_is_linsim()) {
91 gate_ctrl = set_field(gate_ctrl,
92 therm_gate_ctrl_eng_delay_after_m(),
93 therm_gate_ctrl_eng_delay_after_f(4));
94 }
95
96 gate_ctrl = set_field(gate_ctrl, 90 gate_ctrl = set_field(gate_ctrl,
97 therm_gate_ctrl_eng_idle_filt_exp_m(), 91 therm_gate_ctrl_eng_idle_filt_exp_m(),
98 therm_gate_ctrl_eng_idle_filt_exp_f(2)); 92 therm_gate_ctrl_eng_idle_filt_exp_f(2));