diff options
author | Sunny He <suhe@nvidia.com> | 2017-06-29 17:24:29 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-02 17:43:27 -0400 |
commit | 11e29991acd25baef5b786605e136b5e71737b8e (patch) | |
tree | 1fd738a07e172ef7cdc2882359424be246964ce3 /drivers/gpu/nvgpu/gp106 | |
parent | a15e110a9b790f55a5c6e257cfbf7f7235f5a334 (diff) |
gpu: nvgpu: Reorg clk HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the clk
and clk_arb sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I553353df836b187b8eac61e16b63080b570c96b8
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1511076
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_arb_gp106.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_arb_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_gp106.c | 19 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_gp106.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 32 |
5 files changed, 48 insertions, 30 deletions
diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c index 4a907521..5f9c251f 100644 --- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c | |||
@@ -16,13 +16,13 @@ | |||
16 | #include "clk/clk_arb.h" | 16 | #include "clk/clk_arb.h" |
17 | #include "clk_arb_gp106.h" | 17 | #include "clk_arb_gp106.h" |
18 | 18 | ||
19 | static u32 gp106_get_arbiter_clk_domains(struct gk20a *g) | 19 | u32 gp106_get_arbiter_clk_domains(struct gk20a *g) |
20 | { | 20 | { |
21 | (void)g; | 21 | (void)g; |
22 | return (CTRL_CLK_DOMAIN_MCLK|CTRL_CLK_DOMAIN_GPC2CLK); | 22 | return (CTRL_CLK_DOMAIN_MCLK|CTRL_CLK_DOMAIN_GPC2CLK); |
23 | } | 23 | } |
24 | 24 | ||
25 | static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, | 25 | int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, |
26 | u16 *min_mhz, u16 *max_mhz) | 26 | u16 *min_mhz, u16 *max_mhz) |
27 | { | 27 | { |
28 | enum nv_pmu_clk_clkwhich clkwhich; | 28 | enum nv_pmu_clk_clkwhich clkwhich; |
@@ -68,7 +68,7 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, | |||
68 | return 0; | 68 | return 0; |
69 | } | 69 | } |
70 | 70 | ||
71 | static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, | 71 | int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, |
72 | u16 *default_mhz) | 72 | u16 *default_mhz) |
73 | { | 73 | { |
74 | enum nv_pmu_clk_clkwhich clkwhich; | 74 | enum nv_pmu_clk_clkwhich clkwhich; |
@@ -96,11 +96,3 @@ static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, | |||
96 | 96 | ||
97 | return 0; | 97 | return 0; |
98 | } | 98 | } |
99 | |||
100 | void gp106_init_clk_arb_ops(struct gpu_ops *gops) | ||
101 | { | ||
102 | gops->clk_arb.get_arbiter_clk_domains = gp106_get_arbiter_clk_domains; | ||
103 | gops->clk_arb.get_arbiter_clk_range = gp106_get_arbiter_clk_range; | ||
104 | gops->clk_arb.get_arbiter_clk_default = gp106_get_arbiter_clk_default; | ||
105 | gops->clk_arb.get_current_pstate = nvgpu_clk_arb_get_current_pstate; | ||
106 | } | ||
diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.h b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.h index a9877199..5b5ca4a9 100644 --- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.h +++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -16,6 +16,10 @@ | |||
16 | #ifndef CLK_ARB_GP106_H | 16 | #ifndef CLK_ARB_GP106_H |
17 | #define CLK_ARB_GP106_H | 17 | #define CLK_ARB_GP106_H |
18 | 18 | ||
19 | void gp106_init_clk_arb_ops(struct gpu_ops *gops); | 19 | u32 gp106_get_arbiter_clk_domains(struct gk20a *g); |
20 | int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, | ||
21 | u16 *min_mhz, u16 *max_mhz); | ||
22 | int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, | ||
23 | u16 *default_mhz); | ||
20 | 24 | ||
21 | #endif /* CLK_ARB_GP106_H */ | 25 | #endif /* CLK_ARB_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.c b/drivers/gpu/nvgpu/gp106/clk_gp106.c index e9aec7ac..105f8bd5 100644 --- a/drivers/gpu/nvgpu/gp106/clk_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_gp106.c | |||
@@ -47,12 +47,12 @@ static int clk_gp106_debugfs_init(struct gk20a *g); | |||
47 | 47 | ||
48 | 48 | ||
49 | static u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *); | 49 | static u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *); |
50 | static u32 gp106_crystal_clk_hz(struct gk20a *g) | 50 | u32 gp106_crystal_clk_hz(struct gk20a *g) |
51 | { | 51 | { |
52 | return (XTAL4X_KHZ * 1000); | 52 | return (XTAL4X_KHZ * 1000); |
53 | } | 53 | } |
54 | 54 | ||
55 | static unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain) | 55 | unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain) |
56 | { | 56 | { |
57 | struct clk_gk20a *clk = &g->clk; | 57 | struct clk_gk20a *clk = &g->clk; |
58 | u32 freq_khz; | 58 | u32 freq_khz; |
@@ -76,7 +76,8 @@ static unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain) | |||
76 | return freq_khz * 1000UL; | 76 | return freq_khz * 1000UL; |
77 | } | 77 | } |
78 | 78 | ||
79 | static int gp106_init_clk_support(struct gk20a *g) { | 79 | int gp106_init_clk_support(struct gk20a *g) |
80 | { | ||
80 | struct clk_gk20a *clk = &g->clk; | 81 | struct clk_gk20a *clk = &g->clk; |
81 | u32 err = 0; | 82 | u32 err = 0; |
82 | 83 | ||
@@ -273,18 +274,8 @@ err_out: | |||
273 | } | 274 | } |
274 | #endif /* CONFIG_DEBUG_FS */ | 275 | #endif /* CONFIG_DEBUG_FS */ |
275 | 276 | ||
276 | static int gp106_suspend_clk_support(struct gk20a *g) | 277 | int gp106_suspend_clk_support(struct gk20a *g) |
277 | { | 278 | { |
278 | nvgpu_mutex_destroy(&g->clk.clk_mutex); | 279 | nvgpu_mutex_destroy(&g->clk.clk_mutex); |
279 | return 0; | 280 | return 0; |
280 | } | 281 | } |
281 | |||
282 | void gp106_init_clk_ops(struct gpu_ops *gops) { | ||
283 | gops->clk.init_clk_support = gp106_init_clk_support; | ||
284 | gops->clk.get_crystal_clk_hz = gp106_crystal_clk_hz; | ||
285 | gops->clk.measure_freq = gp106_clk_measure_freq; | ||
286 | gops->clk.suspend_clk_support = gp106_suspend_clk_support; | ||
287 | gops->clk.mclk_init = gp106_mclk_init; | ||
288 | gops->clk.mclk_change = gp106_mclk_change; | ||
289 | gops->clk.mclk_deinit = gp106_mclk_deinit; | ||
290 | } | ||
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.h b/drivers/gpu/nvgpu/gp106/clk_gp106.h index 3c2e31d1..9adea2b2 100644 --- a/drivers/gpu/nvgpu/gp106/clk_gp106.h +++ b/drivers/gpu/nvgpu/gp106/clk_gp106.h | |||
@@ -51,6 +51,9 @@ struct namemap_cfg { | |||
51 | char name[24]; | 51 | char name[24]; |
52 | }; | 52 | }; |
53 | 53 | ||
54 | void gp106_init_clk_ops(struct gpu_ops *gops); | 54 | int gp106_init_clk_support(struct gk20a *g); |
55 | u32 gp106_crystal_clk_hz(struct gk20a *g); | ||
56 | unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain); | ||
57 | int gp106_suspend_clk_support(struct gk20a *g); | ||
55 | 58 | ||
56 | #endif /* CLK_GP106_H */ | 59 | #endif /* CLK_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 0caf890f..38778da7 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -46,6 +46,7 @@ | |||
46 | 46 | ||
47 | #include "gp106/clk_gp106.h" | 47 | #include "gp106/clk_gp106.h" |
48 | #include "gp106/clk_arb_gp106.h" | 48 | #include "gp106/clk_arb_gp106.h" |
49 | #include "gp106/mclk_gp106.h" | ||
49 | #include "gm206/bios_gm206.h" | 50 | #include "gm206/bios_gm206.h" |
50 | #include "gp106/therm_gp106.h" | 51 | #include "gp106/therm_gp106.h" |
51 | #include "gp106/xve_gp106.h" | 52 | #include "gp106/xve_gp106.h" |
@@ -72,6 +73,7 @@ | |||
72 | #include <nvgpu/hw/gp106/hw_top_gp106.h> | 73 | #include <nvgpu/hw/gp106/hw_top_gp106.h> |
73 | #include <nvgpu/hw/gp106/hw_pram_gp106.h> | 74 | #include <nvgpu/hw/gp106/hw_pram_gp106.h> |
74 | 75 | ||
76 | |||
75 | static int gp106_get_litter_value(struct gk20a *g, int value) | 77 | static int gp106_get_litter_value(struct gk20a *g, int value) |
76 | { | 78 | { |
77 | int ret = -EINVAL; | 79 | int ret = -EINVAL; |
@@ -353,6 +355,21 @@ static const struct gpu_ops gp106_ops = { | |||
353 | .get_internal_sensor_limits = gp106_get_internal_sensor_limits, | 355 | .get_internal_sensor_limits = gp106_get_internal_sensor_limits, |
354 | .configure_therm_alert = gp106_configure_therm_alert, | 356 | .configure_therm_alert = gp106_configure_therm_alert, |
355 | }, | 357 | }, |
358 | .clk = { | ||
359 | .init_clk_support = gp106_init_clk_support, | ||
360 | .get_crystal_clk_hz = gp106_crystal_clk_hz, | ||
361 | .measure_freq = gp106_clk_measure_freq, | ||
362 | .suspend_clk_support = gp106_suspend_clk_support, | ||
363 | .mclk_init = gp106_mclk_init, | ||
364 | .mclk_change = gp106_mclk_change, | ||
365 | .mclk_deinit = gp106_mclk_deinit, | ||
366 | }, | ||
367 | .clk_arb = { | ||
368 | .get_arbiter_clk_domains = gp106_get_arbiter_clk_domains, | ||
369 | .get_arbiter_clk_range = gp106_get_arbiter_clk_range, | ||
370 | .get_arbiter_clk_default = gp106_get_arbiter_clk_default, | ||
371 | .get_current_pstate = nvgpu_clk_arb_get_current_pstate, | ||
372 | }, | ||
356 | .regops = { | 373 | .regops = { |
357 | .get_global_whitelist_ranges = | 374 | .get_global_whitelist_ranges = |
358 | gp106_get_global_whitelist_ranges, | 375 | gp106_get_global_whitelist_ranges, |
@@ -470,6 +487,19 @@ int gp106_init_hal(struct gk20a *g) | |||
470 | gops->fecs_trace = gp106_ops.fecs_trace; | 487 | gops->fecs_trace = gp106_ops.fecs_trace; |
471 | gops->pramin = gp106_ops.pramin; | 488 | gops->pramin = gp106_ops.pramin; |
472 | gops->therm = gp106_ops.therm; | 489 | gops->therm = gp106_ops.therm; |
490 | /* | ||
491 | * clk must be assigned member by member | ||
492 | * since some clk ops are assigned during probe prior to HAL init | ||
493 | */ | ||
494 | gops->clk.init_clk_support = gp106_ops.clk.init_clk_support; | ||
495 | gops->clk.get_crystal_clk_hz = gp106_ops.clk.get_crystal_clk_hz; | ||
496 | gops->clk.measure_freq = gp106_ops.clk.measure_freq; | ||
497 | gops->clk.suspend_clk_support = gp106_ops.clk.suspend_clk_support; | ||
498 | gops->clk.mclk_init = gp106_ops.clk.mclk_init; | ||
499 | gops->clk.mclk_change = gp106_ops.clk.mclk_change; | ||
500 | gops->clk.mclk_deinit = gp106_ops.clk.mclk_deinit; | ||
501 | |||
502 | gops->clk_arb = gp106_ops.clk_arb; | ||
473 | gops->regops = gp106_ops.regops; | 503 | gops->regops = gp106_ops.regops; |
474 | gops->mc = gp106_ops.mc; | 504 | gops->mc = gp106_ops.mc; |
475 | gops->debug = gp106_ops.debug; | 505 | gops->debug = gp106_ops.debug; |
@@ -499,8 +529,6 @@ int gp106_init_hal(struct gk20a *g) | |||
499 | gp106_init_fb(gops); | 529 | gp106_init_fb(gops); |
500 | gp106_init_mm(gops); | 530 | gp106_init_mm(gops); |
501 | gp106_init_pmu_ops(g); | 531 | gp106_init_pmu_ops(g); |
502 | gp106_init_clk_ops(gops); | ||
503 | gp106_init_clk_arb_ops(gops); | ||
504 | 532 | ||
505 | g->name = "gp10x"; | 533 | g->name = "gp10x"; |
506 | 534 | ||