diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-05-10 11:05:24 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-05 02:05:18 -0400 |
commit | 673dd971600b26131c0afdb221e13c080da022fd (patch) | |
tree | 7c8416ac2ef61891812773d55c8c8dc61da824aa /drivers/gpu/nvgpu/gp106/sec2_gp106.h | |
parent | 7668ccb2a2e4a8c13d82b427c65be79c725afe08 (diff) |
gpu: nvgpu: moved & renamed "struct pmu_gk20a"
- Renamed "struct pmu_gk20a" to "struct nvgpu_pmu" then moved
to file "pmu.h" under folder "drivers/gpu/nvgpu/include/nvgpu/"
- Included header file "pmu.h" to dependent file &
removed "pmu_gk20a.h" include if its usage is not present.
- Replaced "struct pmu_gk20a" with "struct nvgpu_pmu" in dependent
source & header files.
JIRA NVGPU-56
Change-Id: Ia3c606616831027093d5c216959c6a40d7c2632e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1479209
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/sec2_gp106.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/sec2_gp106.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.h b/drivers/gpu/nvgpu/gp106/sec2_gp106.h index 336bb0f0..e3da0abf 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.h +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -16,12 +16,12 @@ | |||
16 | 16 | ||
17 | int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout); | 17 | int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout); |
18 | int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout); | 18 | int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout); |
19 | void sec2_copy_to_dmem(struct pmu_gk20a *pmu, | 19 | void sec2_copy_to_dmem(struct nvgpu_pmu *pmu, |
20 | u32 dst, u8 *src, u32 size, u8 port); | 20 | u32 dst, u8 *src, u32 size, u8 port); |
21 | void sec2_dump_falcon_stats(struct pmu_gk20a *pmu); | 21 | void sec2_dump_falcon_stats(struct nvgpu_pmu *pmu); |
22 | int bl_bootstrap_sec2(struct pmu_gk20a *pmu, | 22 | int bl_bootstrap_sec2(struct nvgpu_pmu *pmu, |
23 | void *desc, u32 bl_sz); | 23 | void *desc, u32 bl_sz); |
24 | void sec_enable_irq(struct pmu_gk20a *pmu, bool enable); | 24 | void sec_enable_irq(struct nvgpu_pmu *pmu, bool enable); |
25 | void init_pmu_setup_hw1(struct gk20a *g); | 25 | void init_pmu_setup_hw1(struct gk20a *g); |
26 | int init_sec2_setup_hw1(struct gk20a *g, | 26 | int init_sec2_setup_hw1(struct gk20a *g, |
27 | void *desc, u32 bl_sz); | 27 | void *desc, u32 bl_sz); |