diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-02-13 04:07:18 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-08 02:27:49 -0500 |
commit | cc4b9f540f66abc9f60cf9f8e2217ff17349bc77 (patch) | |
tree | 695dca926578d8b02fab2cbf9fb98d3d4733c39f /drivers/gpu/nvgpu/gp106/sec2_gp106.c | |
parent | 418f31cd91a5c3ca45f0920ed64205def49c8a80 (diff) |
gpu: nvgpu: PMU super surface support
- Added ops "pmu.alloc_super_surface" to create
memory space for pmu super surface
- Defined method nvgpu_pmu_sysmem_surface_alloc()
to allocate pmu super surface memory & assigned
to "pmu.alloc_super_surface" for gv100
- "pmu.alloc_super_surface" set to NULL for gp106
- Memory space of size "struct nv_pmu_super_surface"
is allocated during pmu sw init setup if
"pmu.alloc_super_surface" is not NULL &
free if error occur.
- Added ops "pmu_ver.config_pmu_cmdline_args_super_surface"
to describe PMU super surface details to PMU ucode
as part of pmu command line args command if
"pmu.alloc_super_surface" is not NULL.
- Updated pmu_cmdline_args_v6 to include member
"struct flcn_mem_desc_v0 super_surface"
- Free allocated memory for PMU super surface in
nvgpu_remove_pmu_support() method
- Added "struct nvgpu_mem super_surface_buf" to "nvgpu_pmu" struct
- Created header file "gpmu_super_surf_if.h" to include interface
about pmu super surface, added "struct nv_pmu_super_surface"
to hold super surface members along with rsvd[x] dummy space
to sync members offset with PMU super surface members.
Change-Id: I2b28912bf4d86a8cc72884e3b023f21c73fb3503
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1656571
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/sec2_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/sec2_gp106.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c index 8e4e5900..08c7f84a 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c | |||
@@ -178,6 +178,8 @@ void init_pmu_setup_hw1(struct gk20a *g) | |||
178 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_base(pmu); | 178 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_base(pmu); |
179 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx( | 179 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx( |
180 | pmu, GK20A_PMU_DMAIDX_VIRT); | 180 | pmu, GK20A_PMU_DMAIDX_VIRT); |
181 | if (g->ops.pmu_ver.config_pmu_cmdline_args_super_surface) | ||
182 | g->ops.pmu_ver.config_pmu_cmdline_args_super_surface(pmu); | ||
181 | 183 | ||
182 | nvgpu_flcn_copy_to_dmem(pmu->flcn, g->acr.pmu_args, | 184 | nvgpu_flcn_copy_to_dmem(pmu->flcn, g->acr.pmu_args, |
183 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), | 185 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), |