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authorAlex Waterman <alexw@nvidia.com>2018-03-01 23:47:25 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-03 01:10:14 -0500
commit89fbf39a05483917c0a9f3453fd94c724bc37375 (patch)
tree55fdd147c0a7eb80b8fc50ecd9f4b0c80f1322f1 /drivers/gpu/nvgpu/gp106/sec2_gp106.c
parentef116a6e632522def7493921666c3241318ce100 (diff)
Revert "Revert "gpu: nvgpu: Get coherency on gv100 + NVLINK working""
This reverts commit 5a35a95654d561fce09a3b9abf6b82bb7a29d74b. JIRA EVLR-2333 Change-Id: I923c32496c343d39d34f6d406c38a9f6ce7dc6e0 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1667167 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/sec2_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/sec2_gp106.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
index 29aceb7c..8e4e5900 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
@@ -99,6 +99,7 @@ int bl_bootstrap_sec2(struct nvgpu_pmu *pmu,
99 nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | 99 nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
100 pwr_pmu_new_instblk_valid_f(1) | 100 pwr_pmu_new_instblk_valid_f(1) |
101 nvgpu_aperture_mask(g, &mm->pmu.inst_block, 101 nvgpu_aperture_mask(g, &mm->pmu.inst_block,
102 pwr_pmu_new_instblk_target_sys_ncoh_f(),
102 pwr_pmu_new_instblk_target_sys_coh_f(), 103 pwr_pmu_new_instblk_target_sys_coh_f(),
103 pwr_pmu_new_instblk_target_fb_f())); 104 pwr_pmu_new_instblk_target_fb_f()));
104 105
@@ -165,6 +166,7 @@ void init_pmu_setup_hw1(struct gk20a *g)
165 nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | 166 nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
166 pwr_pmu_new_instblk_valid_f(1) | 167 pwr_pmu_new_instblk_valid_f(1) |
167 nvgpu_aperture_mask(g, &mm->pmu.inst_block, 168 nvgpu_aperture_mask(g, &mm->pmu.inst_block,
169 pwr_pmu_new_instblk_target_sys_ncoh_f(),
168 pwr_pmu_new_instblk_target_sys_coh_f(), 170 pwr_pmu_new_instblk_target_sys_coh_f(),
169 pwr_pmu_new_instblk_target_fb_f())); 171 pwr_pmu_new_instblk_target_fb_f()));
170 172