diff options
author | Timo Alho <talho@nvidia.com> | 2018-03-05 02:31:06 -0500 |
---|---|---|
committer | Timo Alho <talho@nvidia.com> | 2018-03-05 11:39:57 -0500 |
commit | 848af2ce6de6140323a6ffe3075bf8021e119434 (patch) | |
tree | c89f28ac819f637b554f191da2f6a0fd8d75253e /drivers/gpu/nvgpu/gp106/sec2_gp106.c | |
parent | 89fbf39a05483917c0a9f3453fd94c724bc37375 (diff) |
Revert "Revert "Revert "gpu: nvgpu: Get coherency on gv100 + NVLINK working"""
This reverts commit 89fbf39a05483917c0a9f3453fd94c724bc37375.
Bug 2075315
Change-Id: Id34a0376be5160b164931926ec600f77edf69667
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1668487
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/sec2_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/sec2_gp106.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c index 8e4e5900..29aceb7c 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c | |||
@@ -99,7 +99,6 @@ int bl_bootstrap_sec2(struct nvgpu_pmu *pmu, | |||
99 | nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | | 99 | nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | |
100 | pwr_pmu_new_instblk_valid_f(1) | | 100 | pwr_pmu_new_instblk_valid_f(1) | |
101 | nvgpu_aperture_mask(g, &mm->pmu.inst_block, | 101 | nvgpu_aperture_mask(g, &mm->pmu.inst_block, |
102 | pwr_pmu_new_instblk_target_sys_ncoh_f(), | ||
103 | pwr_pmu_new_instblk_target_sys_coh_f(), | 102 | pwr_pmu_new_instblk_target_sys_coh_f(), |
104 | pwr_pmu_new_instblk_target_fb_f())); | 103 | pwr_pmu_new_instblk_target_fb_f())); |
105 | 104 | ||
@@ -166,7 +165,6 @@ void init_pmu_setup_hw1(struct gk20a *g) | |||
166 | nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | | 165 | nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | |
167 | pwr_pmu_new_instblk_valid_f(1) | | 166 | pwr_pmu_new_instblk_valid_f(1) | |
168 | nvgpu_aperture_mask(g, &mm->pmu.inst_block, | 167 | nvgpu_aperture_mask(g, &mm->pmu.inst_block, |
169 | pwr_pmu_new_instblk_target_sys_ncoh_f(), | ||
170 | pwr_pmu_new_instblk_target_sys_coh_f(), | 168 | pwr_pmu_new_instblk_target_sys_coh_f(), |
171 | pwr_pmu_new_instblk_target_fb_f())); | 169 | pwr_pmu_new_instblk_target_fb_f())); |
172 | 170 | ||