gpu: nvgpu: falcon code cleanup

-Created common falcon function nvgpu_flcn_bl_bootstrap() to
 bootstrap falcon bootloader

-Created HAL gk20a_falcon_bl_bootstrap() which does actual
 bootloader bootstrap by fetching parameters and loading
 code/parameters as needed.

-Created HAL ops bl_bootstrap under nvgpu_falcon_ops.

-Created struct nvgpu_falcon_bl_info to hold info required
 for bootloader to pass to common function

-Removed falcons bootstrap code in multiple file & made
 changes to fill struct nvgpu_falcon_bl_info & call
 nvgpu_flcn_bl_bootstrap().

Change-Id: Iee275233915ff11f9afb5207ac0c3338ca9dacc1
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1756104
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 7 insertions, 23 deletions

diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
index d480d875..29fc2df0 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
@@ -82,12 +82,9 @@ int bl_bootstrap_sec2(struct nvgpu_pmu *pmu,
         void *desc, u32 bl_sz)
 {
         struct gk20a *g = gk20a_from_pmu(pmu);
-        struct acr_desc *acr = &g->acr;
         struct mm_gk20a *mm = &g->mm;
-        u32 virt_addr = 0;
-        struct hsflcn_bl_desc *pmu_bl_gm10x_desc = g->acr.pmu_hsbl_desc;
+        struct nvgpu_falcon_bl_info bl_info;
         u32 data = 0;
-        u32 dst;
 
         nvgpu_log_fn(g, " ");
 
@@ -113,25 +110,12 @@ int bl_bootstrap_sec2(struct nvgpu_pmu *pmu,
         data |= (1 << 3);
         gk20a_writel(g, psec_falcon_engctl_r(), data);
 
-        /*copy bootloader interface structure to dmem*/
-        nvgpu_flcn_copy_to_dmem(&g->sec2_flcn, 0, (u8 *)desc,
-                sizeof(struct flcn_bl_dmem_desc), 0);
-
-        /* copy bootloader to TOP of IMEM */
-        dst = (psec_falcon_hwcfg_imem_size_v(
-                        gk20a_readl(g, psec_falcon_hwcfg_r())) << 8) - bl_sz;
-
-        nvgpu_flcn_copy_to_imem(&g->sec2_flcn, dst,
-                (u8 *)(acr->hsbl_ucode.cpu_va), bl_sz, 0, 0,
-                pmu_bl_gm10x_desc->bl_start_tag);
-
-        gm20b_dbg_pmu(g, "Before starting falcon with BL\n");
-
-        gk20a_writel(g, psec_falcon_mailbox0_r(), 0xDEADA5A5);
-
-        virt_addr = pmu_bl_gm10x_desc->bl_start_tag << 8;
-
-        nvgpu_flcn_bootstrap(&g->sec2_flcn, virt_addr);
+        bl_info.bl_src = g->acr.hsbl_ucode.cpu_va;
+        bl_info.bl_desc = desc;
+        bl_info.bl_desc_size = sizeof(struct flcn_bl_dmem_desc_v1);
+        bl_info.bl_size = bl_sz;
+        bl_info.bl_start_tag = g->acr.pmu_hsbl_desc->bl_start_tag;
+        nvgpu_flcn_bl_bootstrap(&g->sec2_flcn, &bl_info);
 
         return 0;
 }