gpu: nvgpu: Enable IO coherency on GV100

This reverts commit 848af2ce6de6140323a6ffe3075bf8021e119434.

This is a revert of a revert, etc, etc. It re-enables IO coherence again.

JIRA EVLR-2333

Change-Id: Ibf97dce2f892e48a1200a06cd38a1c5d9603be04
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1669722
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
index 29aceb7c..8e4e5900 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
@@ -99,6 +99,7 @@ int bl_bootstrap_sec2(struct nvgpu_pmu *pmu,
                         nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
                         pwr_pmu_new_instblk_valid_f(1) |
                         nvgpu_aperture_mask(g, &mm->pmu.inst_block,
+                                pwr_pmu_new_instblk_target_sys_ncoh_f(),
                                 pwr_pmu_new_instblk_target_sys_coh_f(),
                                 pwr_pmu_new_instblk_target_fb_f()));
 
@@ -165,6 +166,7 @@ void init_pmu_setup_hw1(struct gk20a *g)
                                         nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
                                 pwr_pmu_new_instblk_valid_f(1) |
                                 nvgpu_aperture_mask(g, &mm->pmu.inst_block,
+                                        pwr_pmu_new_instblk_target_sys_ncoh_f(),
                                         pwr_pmu_new_instblk_target_sys_coh_f(),
                                         pwr_pmu_new_instblk_target_fb_f()));