gpu: nvgpu: Falcon controller halt interrupt status clear

- Added nvgpu_flcn_clear_halt_intr_status() to
Wait for halt interrupt status clear by
clear_halt_interrupt_status() HAL within timeout

- Added gk20a_flcn_clear_halt_interrupt_status()
to clear falcon controller halt interrupt status

- Replaced flacon halt interrupt clear with
nvgpu_flcn_clear_halt_intr_status() method

NVGPU JIRA-99

Change-Id: I762a3c01cd1d02028eb6aaa9898a50be94376619
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1511333
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 6 insertions, 18 deletions

diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
index 20171309..0f265710 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
@@ -34,24 +34,12 @@
 
 int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout)
 {
-        u32 data = 0;
-        struct nvgpu_timeout to;
-
-        nvgpu_timeout_init(g, &to, timeout, NVGPU_TIMER_CPU_TIMER);
-        do {
-                gk20a_writel(g, psec_falcon_irqsclr_r(),
-                             gk20a_readl(g, psec_falcon_irqsclr_r()) | (0x10));
-                data = gk20a_readl(g, psec_falcon_irqstat_r());
-                if ((data & psec_falcon_irqstat_halt_true_f()) !=
-                        psec_falcon_irqstat_halt_true_f())
-                        /*halt irq is clear*/
-                        break;
-                nvgpu_udelay(1);
-        } while (!nvgpu_timeout_expired(&to));
-
-        if (nvgpu_timeout_peek_expired(&to))
-                return -EBUSY;
-        return 0;
+        int status = 0;
+
+        if (nvgpu_flcn_clear_halt_intr_status(&g->sec2_flcn, timeout))
+                status = -EBUSY;
+
+        return status;
 }
 
 int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout)